From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2EF5C1DC077 for ; Mon, 7 Oct 2024 17:01:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.167.242.64 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728320501; cv=none; b=uW+3S27EYGgX9J+u94umIjvy+KVwBl2ibtZWwe+ShSP3HgcbobWqr94jn3Wh3FL3/J8eePn9bVDqN36FbJ8lLXxapYlawpCjvSBgi9gaFSvUpXBYG5bWAukQKgpZjXlZ2a7C+iO9U3Qxw2+J8osW5QesNOGTreqTdbooUBuOE8I= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728320501; c=relaxed/simple; bh=AbMEOw93QpMNA2VLo4O5BMIQ6k/dgsGjKI0UHF5F9yc=; h=Message-ID:Subject:From:To:Cc:Date:In-Reply-To:References: Content-Type:MIME-Version; b=YvIQpRYGDUT47LBwzDLC/Yb2BcvLQ1rq1nmTCoLXlD7dYDL+Uvuc/8rts4p3ZcpPX5HPmAPVOL+JCZ/+Rlq1yRjn1rWa38hylb+xYqDOmsp7PaH4VOWC1CK+ECoy3Ulq9kM5IMa+ALsEzUDl0+GbxIGKR6I1oSTrT/Cp1pYm4no= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ideasonboard.com; spf=pass smtp.mailfrom=ideasonboard.com; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b=KAx4tdC2; arc=none smtp.client-ip=213.167.242.64 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="KAx4tdC2" Received: from isaac-ThinkPad-T16-Gen-2.local (cpc89244-aztw30-2-0-cust6594.18-1.cable.virginm.net [86.31.185.195]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 90ED1792; Mon, 7 Oct 2024 19:00:00 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1728320401; bh=AbMEOw93QpMNA2VLo4O5BMIQ6k/dgsGjKI0UHF5F9yc=; h=Subject:From:To:Cc:Date:In-Reply-To:References:From; b=KAx4tdC2+hP7gWXw0kQgcd/huRYwMJ6wLpgLfYLxlw+vwF770PoE01iuMG/sucTRe 19EjJgZJ8bzfgpGWIwH1YdmLmoHS85vvKnGqimzOPM3tNO/yUunbeB2ry7xWTpVoCT JZqGxArpraB98jG/B/WktnJkizqD4aXDg6jieJJY= Message-ID: <7ae0cd7774f4b3e30cc033a7e543546732dbced0.camel@ideasonboard.com> Subject: Re: [PATCH] drm: lcdif: Use adjusted_mode .clock instead of .crtc_clock From: Isaac Scott To: Marek Vasut , Alexander Stein , dri-devel@lists.freedesktop.org Cc: Daniel Vetter , David Airlie , Fabio Estevam , Lucas Stach , "Lukas F . Hartmann" , Maarten Lankhorst , Maxime Ripard , Pengutronix Kernel Team , Sascha Hauer , Shawn Guo , Stefan Agner , Thomas Zimmermann , imx@lists.linux.dev, kernel@dh-electronics.com, linux-arm-kernel@lists.infradead.org, kieran.bingham@ideasonboard.com Date: Mon, 07 Oct 2024 18:01:33 +0100 In-Reply-To: References: <20240531202813.277109-1-marex@denx.de> <1897634.CQOukoFCf9@steina-w> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.54.0 (by Flathub.org) Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Hi Marek, On Sat, 2024-07-06 at 02:16 +0200, Marek Vasut wrote: > On 6/24/24 11:19 AM, Alexander Stein wrote: > > Am Freitag, 31. Mai 2024, 22:27:21 CEST schrieb Marek Vasut: > > > In case an upstream bridge modified the required clock frequency > > > in its .atomic_check callback by setting adjusted_mode.clock , > > > make sure that clock frequency is generated by the LCDIFv3 block. > > >=20 > > > This is useful e.g. when LCDIFv3 feeds DSIM which feeds TC358767 > > > with (e)DP output, where the TC358767 expects precise timing on > > > its input side, the precise timing must be generated by the > > > LCDIF. > > >=20 > > > Signed-off-by: Marek Vasut > >=20 > > With the other rc358767 patches in place, this does the trick. > > Reviewed-by: Alexander Stein >=20 > I'll pick this up next week if there is no objection. Unfortunately, this has caused a regression that is present in v6.12- rc1 on the i.MX8MP PHYTEC Pollux using the arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts. The display is the edt,etml1010g3dra panel, as per the upstream dts. We bisected to this commit, and reverting this change fixed the screen. We then tried to retest this on top of v6.12-rc2, and found we also had to revert commit ff06ea04e4cf3ba2f025024776e83bfbdfa05155 ("clk: imx: clk-imx8mp: Allow media_disp pixel clock reconfigure parent rate") alongside this. Reverting these two commits makes the display work again at -rc2. Do you have any suggestions on anything we might be missing on our end? Please let me know if there's anything you'd like me to test as I'm not sure what the underlying fault was here. Best wishes, Isaac =C2=A0