* [PATCH 0/5] add imx94 DDR Performance Monitor support
@ 2025-08-15 9:36 Xu Yang
2025-08-15 9:36 ` [PATCH 1/5] dt-bindings: perf: fsl-imx-ddr: Add i.MX94 compatible Xu Yang
` (4 more replies)
0 siblings, 5 replies; 13+ messages in thread
From: Xu Yang @ 2025-08-15 9:36 UTC (permalink / raw)
To: Frank Li, Will Deacon, Mark Rutland, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, John Garry, James Clark,
Mike Leach, Leo Yan, Peter Zijlstra, Ingo Molnar,
Arnaldo Carvalho de Melo, Namhyung Kim, Alexander Shishkin,
Jiri Olsa, Ian Rogers, Adrian Hunter
Cc: linux-arm-kernel, linux-perf-users, devicetree, imx, Peng Fan,
Xu Yang
The i.MX94 Soc has a DDR Performance Monitor Unit (PMU), this will
add support for it.
---
Xu Yang (5):
dt-bindings: perf: fsl-imx-ddr: Add i.MX94 compatible
perf: imx_perf: add support for i.MX94 platform
perf vendor events arm64:: Add i.MX94 DDR Performance Monitor metrics
MAINTAINERS: include fsl_imx9_ddr_perf.c and some perf metric files
arm64: dts: imx94: add DDR Perf Monitor node
.../devicetree/bindings/perf/fsl-imx-ddr.yaml | 1 +
MAINTAINERS | 3 +
arch/arm64/boot/dts/freescale/imx94.dtsi | 6 +
drivers/perf/fsl_imx9_ddr_perf.c | 6 +
.../arch/arm64/freescale/imx94/sys/ddrc.json | 9 +
.../arch/arm64/freescale/imx94/sys/metrics.json | 450 +++++++++++++++++++++
6 files changed, 475 insertions(+)
---
base-commit: 2a2b302fb15ebea4da71e3fe2943e61a1c83cde9
change-id: 20250815-imx94-ddr-pmu-14df6248e65e
Best regards,
--
Xu Yang <xu.yang_2@nxp.com>
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 1/5] dt-bindings: perf: fsl-imx-ddr: Add i.MX94 compatible
2025-08-15 9:36 [PATCH 0/5] add imx94 DDR Performance Monitor support Xu Yang
@ 2025-08-15 9:36 ` Xu Yang
2025-08-15 16:26 ` Frank Li
2025-08-15 9:36 ` [PATCH 2/5] perf: imx_perf: add support for i.MX94 platform Xu Yang
` (3 subsequent siblings)
4 siblings, 1 reply; 13+ messages in thread
From: Xu Yang @ 2025-08-15 9:36 UTC (permalink / raw)
To: Frank Li, Will Deacon, Mark Rutland, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, John Garry, James Clark,
Mike Leach, Leo Yan, Peter Zijlstra, Ingo Molnar,
Arnaldo Carvalho de Melo, Namhyung Kim, Alexander Shishkin,
Jiri Olsa, Ian Rogers, Adrian Hunter
Cc: linux-arm-kernel, linux-perf-users, devicetree, imx, Peng Fan,
Xu Yang
i.MX94 has a DDR Performance Monitor Unit which is compatible with i.MX93.
This will add a compatible for i.MX94.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
---
Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml b/Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml
index 8597ea625edba5d0e2a3373ae6cd45bb1ba351cc..d2e578d6b83b8847c7a0ca9d5aeb208a90e2fa6a 100644
--- a/Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml
+++ b/Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml
@@ -33,6 +33,7 @@ properties:
- items:
- enum:
- fsl,imx91-ddr-pmu
+ - fsl,imx94-ddr-pmu
- fsl,imx95-ddr-pmu
- const: fsl,imx93-ddr-pmu
--
2.34.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 2/5] perf: imx_perf: add support for i.MX94 platform
2025-08-15 9:36 [PATCH 0/5] add imx94 DDR Performance Monitor support Xu Yang
2025-08-15 9:36 ` [PATCH 1/5] dt-bindings: perf: fsl-imx-ddr: Add i.MX94 compatible Xu Yang
@ 2025-08-15 9:36 ` Xu Yang
2025-08-15 16:27 ` Frank Li
2025-08-15 9:36 ` [PATCH 3/5] perf vendor events arm64:: Add i.MX94 DDR Performance Monitor metrics Xu Yang
` (2 subsequent siblings)
4 siblings, 1 reply; 13+ messages in thread
From: Xu Yang @ 2025-08-15 9:36 UTC (permalink / raw)
To: Frank Li, Will Deacon, Mark Rutland, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, John Garry, James Clark,
Mike Leach, Leo Yan, Peter Zijlstra, Ingo Molnar,
Arnaldo Carvalho de Melo, Namhyung Kim, Alexander Shishkin,
Jiri Olsa, Ian Rogers, Adrian Hunter
Cc: linux-arm-kernel, linux-perf-users, devicetree, imx, Peng Fan,
Xu Yang
This will add compatible and identifier for i.MX94 platform.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
---
drivers/perf/fsl_imx9_ddr_perf.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/perf/fsl_imx9_ddr_perf.c b/drivers/perf/fsl_imx9_ddr_perf.c
index 267754fdf581469642c4485c28a2b00050fe785f..7050b48c04671759e8cad0e93359c088a2bf342a 100644
--- a/drivers/perf/fsl_imx9_ddr_perf.c
+++ b/drivers/perf/fsl_imx9_ddr_perf.c
@@ -104,6 +104,11 @@ static const struct imx_ddr_devtype_data imx93_devtype_data = {
.filter_ver = DDR_PERF_AXI_FILTER_V1
};
+static const struct imx_ddr_devtype_data imx94_devtype_data = {
+ .identifier = "imx94",
+ .filter_ver = DDR_PERF_AXI_FILTER_V2
+};
+
static const struct imx_ddr_devtype_data imx95_devtype_data = {
.identifier = "imx95",
.filter_ver = DDR_PERF_AXI_FILTER_V2
@@ -122,6 +127,7 @@ static inline bool axi_filter_v2(struct ddr_pmu *pmu)
static const struct of_device_id imx_ddr_pmu_dt_ids[] = {
{ .compatible = "fsl,imx91-ddr-pmu", .data = &imx91_devtype_data },
{ .compatible = "fsl,imx93-ddr-pmu", .data = &imx93_devtype_data },
+ { .compatible = "fsl,imx94-ddr-pmu", .data = &imx94_devtype_data },
{ .compatible = "fsl,imx95-ddr-pmu", .data = &imx95_devtype_data },
{ /* sentinel */ }
};
--
2.34.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 3/5] perf vendor events arm64:: Add i.MX94 DDR Performance Monitor metrics
2025-08-15 9:36 [PATCH 0/5] add imx94 DDR Performance Monitor support Xu Yang
2025-08-15 9:36 ` [PATCH 1/5] dt-bindings: perf: fsl-imx-ddr: Add i.MX94 compatible Xu Yang
2025-08-15 9:36 ` [PATCH 2/5] perf: imx_perf: add support for i.MX94 platform Xu Yang
@ 2025-08-15 9:36 ` Xu Yang
2025-08-15 16:28 ` Frank Li
2025-08-15 9:36 ` [PATCH 4/5] MAINTAINERS: include fsl_imx9_ddr_perf.c and some perf metric files Xu Yang
2025-08-15 9:36 ` [PATCH 5/5] arm64: dts: imx94: add DDR Perf Monitor node Xu Yang
4 siblings, 1 reply; 13+ messages in thread
From: Xu Yang @ 2025-08-15 9:36 UTC (permalink / raw)
To: Frank Li, Will Deacon, Mark Rutland, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, John Garry, James Clark,
Mike Leach, Leo Yan, Peter Zijlstra, Ingo Molnar,
Arnaldo Carvalho de Melo, Namhyung Kim, Alexander Shishkin,
Jiri Olsa, Ian Rogers, Adrian Hunter
Cc: linux-arm-kernel, linux-perf-users, devicetree, imx, Peng Fan,
Xu Yang
Add JSON metrics for i.MX94 DDR Performance Monitor.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
---
.../arch/arm64/freescale/imx94/sys/ddrc.json | 9 +
.../arch/arm64/freescale/imx94/sys/metrics.json | 450 +++++++++++++++++++++
2 files changed, 459 insertions(+)
diff --git a/tools/perf/pmu-events/arch/arm64/freescale/imx94/sys/ddrc.json b/tools/perf/pmu-events/arch/arm64/freescale/imx94/sys/ddrc.json
new file mode 100644
index 0000000000000000000000000000000000000000..aa7b58721dc7e23dc9d9905a79e0c1778b7bbf11
--- /dev/null
+++ b/tools/perf/pmu-events/arch/arm64/freescale/imx94/sys/ddrc.json
@@ -0,0 +1,9 @@
+[
+ {
+ "BriefDescription": "ddr cycles event",
+ "EventCode": "0x00",
+ "EventName": "imx94_ddr.cycles",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ }
+]
diff --git a/tools/perf/pmu-events/arch/arm64/freescale/imx94/sys/metrics.json b/tools/perf/pmu-events/arch/arm64/freescale/imx94/sys/metrics.json
new file mode 100644
index 0000000000000000000000000000000000000000..629f1f52761e2210ef43a9cbba175871817e1230
--- /dev/null
+++ b/tools/perf/pmu-events/arch/arm64/freescale/imx94/sys/metrics.json
@@ -0,0 +1,450 @@
+[
+ {
+ "BriefDescription": "bandwidth usage for lpddr5 evk board",
+ "MetricName": "imx94_bandwidth_usage.lpddr5",
+ "MetricExpr": "(( imx9_ddr0@eddrtq_pm_rd_beat_filt0\\,axi_mask\\=0x000\\,axi_id\\=0x000@ + imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x000\\,axi_id\\=0x000@ ) * 32 / duration_time) / (4266 * 1000000 * 4)",
+ "ScaleUnit": "1e2%",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bandwidth usage for lpddr4 evk board",
+ "MetricName": "imx94_bandwidth_usage.lpddr4",
+ "MetricExpr": "(( imx9_ddr0@eddrtq_pm_rd_beat_filt0\\,axi_mask\\=0x000\\,axi_id\\=0x000@ + imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x000\\,axi_id\\=0x000@ ) * 32 / duration_time) / (4266 * 1000000 * 4)",
+ "ScaleUnit": "1e2%",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of all masters read from ddr",
+ "MetricName": "imx94_ddr_read.all",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt0\\,axi_mask\\=0x000\\,axi_id\\=0x000@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of all masters write to ddr",
+ "MetricName": "imx94_ddr_write.all",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x000\\,axi_id\\=0x000@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of all a55 read from ddr",
+ "MetricName": "imx94_ddr_read.a55_all",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt1\\,axi_mask\\=0x3fc\\,axi_id\\=0x000@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of all a55 write from ddr",
+ "MetricName": "imx94_ddr_write.a55_all",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x3fc\\,axi_id\\=0x000@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of a55 core 0 read from ddr",
+ "MetricName": "imx94_ddr_read.a55_0",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt2\\,axi_mask\\=0x3ff\\,axi_id\\=0x000@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of a55 core 0 write to ddr",
+ "MetricName": "imx94_ddr_write.a55_0",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x3ff\\,axi_id\\=0x000@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of a55 core 1 read from ddr",
+ "MetricName": "imx94_ddr_read.a55_1",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt0\\,axi_mask\\=0x00f\\,axi_id\\=0x001@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of a55 core 1 write to ddr",
+ "MetricName": "imx94_ddr_write.a55_1",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x001@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of a55 core 2 read from ddr",
+ "MetricName": "imx94_ddr_read.a55_2",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt1\\,axi_mask\\=0x00f\\,axi_id\\=0x002@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of a55 core 2 write to ddr",
+ "MetricName": "imx94_ddr_write.a55_2",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x002@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of a55 core 3 read from ddr",
+ "MetricName": "imx94_ddr_read.a55_3",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt2\\,axi_mask\\=0x00f\\,axi_id\\=0x003@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of a55 core 3 write to ddr",
+ "MetricName": "imx94_ddr_write.a55_3",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x003@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of m7 core1 read from ddr",
+ "MetricName": "imx94_ddr_read.m7_1",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt0\\,axi_mask\\=0x00f\\,axi_id\\=0x004@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of m7 core1 write to ddr",
+ "MetricName": "imx94_ddr_write.m7_1",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x004@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of m33 core1 (in netc) read from ddr",
+ "MetricName": "imx94_ddr_read.m33_1",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt1\\,axi_mask\\=0x00f\\,axi_id\\=0x005@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of m33 core1 (in netc) write to ddr",
+ "MetricName": "imx94_ddr_write.m33_1",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x005@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of pcie2 read from ddr",
+ "MetricName": "imx94_ddr_read.pcie2",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt2\\,axi_mask\\=0x00f\\,axi_id\\=0x006@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of pcie2 write to ddr",
+ "MetricName": "imx94_ddr_write.pcie2",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x006@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of Cortex-A DSU L3 evicted/ACP transactions read from ddr",
+ "MetricName": "imx94_ddr_read.cortex_a_dsu",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt0\\,axi_mask\\=0x00f\\,axi_id\\=0x007@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of Cortex-A DSU L3 evicted/ACP transactions write to ddr",
+ "MetricName": "imx94_ddr_write.cortex_a_dsu",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x007@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of m33 core0 read from ddr",
+ "MetricName": "imx94_ddr_read.m33_0",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt1\\,axi_mask\\=0x00f\\,axi_id\\=0x008@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of m33 core0 write to ddr",
+ "MetricName": "imx94_ddr_write.m33_0",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x008@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of m7 core0 read from ddr",
+ "MetricName": "imx94_ddr_read.m7_0",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt2\\,axi_mask\\=0x00f\\,axi_id\\=0x009@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of m7 core0 write to ddr",
+ "MetricName": "imx94_ddr_write.m7_0",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x009@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of sentinel read from ddr",
+ "MetricName": "imx94_ddr_read.sentinel",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt0\\,axi_mask\\=0x00f\\,axi_id\\=0x00a@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of sentinel write to ddr",
+ "MetricName": "imx94_ddr_write.sentinel",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x00a@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of edma1 read from ddr",
+ "MetricName": "imx94_ddr_read.edma1",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt1\\,axi_mask\\=0x00f\\,axi_id\\=0x00b@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of edma1 write to ddr",
+ "MetricName": "imx94_ddr_write.edma1",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x00b@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of edma2 read from ddr",
+ "MetricName": "imx94_ddr_read.edma2",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt2\\,axi_mask\\=0x00f\\,axi_id\\=0x00c@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of edma2 write to ddr",
+ "MetricName": "imx94_ddr_write.edma2",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x00c@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of netc read from ddr",
+ "MetricName": "imx94_ddr_read.netc",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt0\\,axi_mask\\=0x00f\\,axi_id\\=0x00d@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of netc write to ddr",
+ "MetricName": "imx94_ddr_write.netc",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x00d@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of aonmix read from ddr",
+ "MetricName": "imx94_ddr_read.aonmix",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt2\\,axi_mask\\=0x00f\\,axi_id\\=0x00f@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of aonmix write to ddr",
+ "MetricName": "imx94_ddr_write.aonmix",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x00f@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of npumix read from ddr",
+ "MetricName": "imx94_ddr_read.npumix",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt0\\,axi_mask\\=0x3f0\\,axi_id\\=0x010@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of npumix write to ddr",
+ "MetricName": "imx94_ddr_write.npumix",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x3f0\\,axi_id\\=0x010@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of usdhc1 read from ddr",
+ "MetricName": "imx94_ddr_read.usdhc1",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt1\\,axi_mask\\=0x3f0\\,axi_id\\=0x0b0@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of usdhc1 write to ddr",
+ "MetricName": "imx94_ddr_write.usdhc1",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x3f0\\,axi_id\\=0x0b0@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of usdhc2 read from ddr",
+ "MetricName": "imx94_ddr_read.usdhc2",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt2\\,axi_mask\\=0x3f0\\,axi_id\\=0x0c0@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of usdhc2 write to ddr",
+ "MetricName": "imx94_ddr_write.usdhc2",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x3f0\\,axi_id\\=0x0c0@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of usdhc3 read from ddr",
+ "MetricName": "imx94_ddr_read.usdhc3",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt0\\,axi_mask\\=0x3f0\\,axi_id\\=0x0d0@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of usdhc3 write to ddr",
+ "MetricName": "imx94_ddr_write.usdhc3",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x3f0\\,axi_id\\=0x0d0@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of xspi read from ddr",
+ "MetricName": "imx94_ddr_read.xspi",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt2\\,axi_mask\\=0x3f0\\,axi_id\\=0x0f0@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of xspi write to ddr",
+ "MetricName": "imx94_ddr_write.xspi",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x3f0\\,axi_id\\=0x0f0@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of pcie1 read from ddr",
+ "MetricName": "imx94_ddr_read.pcie1",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt0\\,axi_mask\\=0x3f0\\,axi_id\\=0x100@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of pcie1 write to ddr",
+ "MetricName": "imx94_ddr_write.pcie1",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x3f0\\,axi_id\\=0x100@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of usb1 read from ddr",
+ "MetricName": "imx94_ddr_read.usb1",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt1\\,axi_mask\\=0x3f0\\,axi_id\\=0x140@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of usb1 write to ddr",
+ "MetricName": "imx94_ddr_write.usb1",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x3f0\\,axi_id\\=0x140@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of usb2 read from ddr",
+ "MetricName": "imx94_ddr_read.usb2",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt2\\,axi_mask\\=0x3f0\\,axi_id\\=0x150@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of usb2 write to ddr",
+ "MetricName": "imx94_ddr_write.usb2",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x3f0\\,axi_id\\=0x150@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of pxp read from ddr",
+ "MetricName": "imx94_ddr_read.pxp",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt0\\,axi_mask\\=0x3f0\\,axi_id\\=0x2a0@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of pxp write to ddr",
+ "MetricName": "imx94_ddr_write.pxp",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x3f0\\,axi_id\\=0x2a0@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of dcif read from ddr",
+ "MetricName": "imx94_ddr_read.dcif",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt1\\,axi_mask\\=0x3f0\\,axi_id\\=0x2b0@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ },
+ {
+ "BriefDescription": "bytes of dcif write to ddr",
+ "MetricName": "imx94_ddr_write.dcif",
+ "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x3f0\\,axi_id\\=0x2b0@ ) * 32",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx9_ddr",
+ "Compat": "imx94"
+ }
+]
--
2.34.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 4/5] MAINTAINERS: include fsl_imx9_ddr_perf.c and some perf metric files
2025-08-15 9:36 [PATCH 0/5] add imx94 DDR Performance Monitor support Xu Yang
` (2 preceding siblings ...)
2025-08-15 9:36 ` [PATCH 3/5] perf vendor events arm64:: Add i.MX94 DDR Performance Monitor metrics Xu Yang
@ 2025-08-15 9:36 ` Xu Yang
2025-08-15 16:28 ` Frank Li
2025-08-15 9:36 ` [PATCH 5/5] arm64: dts: imx94: add DDR Perf Monitor node Xu Yang
4 siblings, 1 reply; 13+ messages in thread
From: Xu Yang @ 2025-08-15 9:36 UTC (permalink / raw)
To: Frank Li, Will Deacon, Mark Rutland, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, John Garry, James Clark,
Mike Leach, Leo Yan, Peter Zijlstra, Ingo Molnar,
Arnaldo Carvalho de Melo, Namhyung Kim, Alexander Shishkin,
Jiri Olsa, Ian Rogers, Adrian Hunter
Cc: linux-arm-kernel, linux-perf-users, devicetree, imx, Xu Yang
The fsl_imx9_ddr_perf.c and some perf metric files under
tools/perf/pmu-events/arch/arm64/freescale/ is missing in MAINTAINERS.
Add them and add me as another maintainer.
Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
---
MAINTAINERS | 3 +++
1 file changed, 3 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 5eeeef7bf25500987bc1a278758c82c1c68a55a0..163d6591f169d250a77c8c27cc78e0e9b25cefb6 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9780,11 +9780,14 @@ F: drivers/video/fbdev/imxfb.c
FREESCALE IMX DDR PMU DRIVER
M: Frank Li <Frank.li@nxp.com>
+M: Xu Yang <xu.yang_2@nxp.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
F: Documentation/admin-guide/perf/imx-ddr.rst
F: Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml
F: drivers/perf/fsl_imx8_ddr_perf.c
+F: drivers/perf/fsl_imx9_ddr_perf.c
+F: tools/perf/pmu-events/arch/arm64/freescale/
FREESCALE IMX I2C DRIVER
M: Oleksij Rempel <o.rempel@pengutronix.de>
--
2.34.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 5/5] arm64: dts: imx94: add DDR Perf Monitor node
2025-08-15 9:36 [PATCH 0/5] add imx94 DDR Performance Monitor support Xu Yang
` (3 preceding siblings ...)
2025-08-15 9:36 ` [PATCH 4/5] MAINTAINERS: include fsl_imx9_ddr_perf.c and some perf metric files Xu Yang
@ 2025-08-15 9:36 ` Xu Yang
2025-08-15 16:30 ` Frank Li
4 siblings, 1 reply; 13+ messages in thread
From: Xu Yang @ 2025-08-15 9:36 UTC (permalink / raw)
To: Frank Li, Will Deacon, Mark Rutland, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, John Garry, James Clark,
Mike Leach, Leo Yan, Peter Zijlstra, Ingo Molnar,
Arnaldo Carvalho de Melo, Namhyung Kim, Alexander Shishkin,
Jiri Olsa, Ian Rogers, Adrian Hunter
Cc: linux-arm-kernel, linux-perf-users, devicetree, imx, Xu Yang
Add DDR Perf Monitor for i.MX95.
Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
---
arch/arm64/boot/dts/freescale/imx94.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx94.dtsi b/arch/arm64/boot/dts/freescale/imx94.dtsi
index 44dee2cbd42d4bc765c33a9ce663ceda095b6c66..6a2d86d67200facec76a7880b4a2268b4191452c 100644
--- a/arch/arm64/boot/dts/freescale/imx94.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx94.dtsi
@@ -1188,5 +1188,11 @@ wdog3: watchdog@49220000 {
status = "disabled";
};
};
+
+ ddr-pmu@4e090dc0 {
+ compatible = "fsl,imx94-ddr-pmu", "fsl,imx93-ddr-pmu";
+ reg = <0x0 0x4e090dc0 0x0 0x200>;
+ interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
+ };
};
};
--
2.34.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH 1/5] dt-bindings: perf: fsl-imx-ddr: Add i.MX94 compatible
2025-08-15 9:36 ` [PATCH 1/5] dt-bindings: perf: fsl-imx-ddr: Add i.MX94 compatible Xu Yang
@ 2025-08-15 16:26 ` Frank Li
2025-08-15 16:34 ` Conor Dooley
0 siblings, 1 reply; 13+ messages in thread
From: Frank Li @ 2025-08-15 16:26 UTC (permalink / raw)
To: Xu Yang
Cc: Will Deacon, Mark Rutland, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, John Garry, James Clark, Mike Leach, Leo Yan,
Peter Zijlstra, Ingo Molnar, Arnaldo Carvalho de Melo,
Namhyung Kim, Alexander Shishkin, Jiri Olsa, Ian Rogers,
Adrian Hunter, linux-arm-kernel, linux-perf-users, devicetree,
imx, Peng Fan
On Fri, Aug 15, 2025 at 05:36:27PM +0800, Xu Yang wrote:
> i.MX94 has a DDR Performance Monitor Unit which is compatible with i.MX93.
> This will add a compatible for i.MX94.
Add a compatible string fsl,imx94-ddr-pmu for i.MX94
Reviewed-by: Frank Li <Frank.Li@nxp.com>
>
> Reviewed-by: Peng Fan <peng.fan@nxp.com>
> Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
> ---
> Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml b/Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml
> index 8597ea625edba5d0e2a3373ae6cd45bb1ba351cc..d2e578d6b83b8847c7a0ca9d5aeb208a90e2fa6a 100644
> --- a/Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml
> +++ b/Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml
> @@ -33,6 +33,7 @@ properties:
> - items:
> - enum:
> - fsl,imx91-ddr-pmu
> + - fsl,imx94-ddr-pmu
> - fsl,imx95-ddr-pmu
> - const: fsl,imx93-ddr-pmu
>
>
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 2/5] perf: imx_perf: add support for i.MX94 platform
2025-08-15 9:36 ` [PATCH 2/5] perf: imx_perf: add support for i.MX94 platform Xu Yang
@ 2025-08-15 16:27 ` Frank Li
0 siblings, 0 replies; 13+ messages in thread
From: Frank Li @ 2025-08-15 16:27 UTC (permalink / raw)
To: Xu Yang
Cc: Will Deacon, Mark Rutland, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, John Garry, James Clark, Mike Leach, Leo Yan,
Peter Zijlstra, Ingo Molnar, Arnaldo Carvalho de Melo,
Namhyung Kim, Alexander Shishkin, Jiri Olsa, Ian Rogers,
Adrian Hunter, linux-arm-kernel, linux-perf-users, devicetree,
imx, Peng Fan
On Fri, Aug 15, 2025 at 05:36:28PM +0800, Xu Yang wrote:
> This will add compatible and identifier for i.MX94 platform.
Add compatible string and related devtype for i.MX94 platform.
Reviewed-by: Frank Li <Frank.Li@nxp.com>
>
> Reviewed-by: Peng Fan <peng.fan@nxp.com>
> Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
> ---
> drivers/perf/fsl_imx9_ddr_perf.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/perf/fsl_imx9_ddr_perf.c b/drivers/perf/fsl_imx9_ddr_perf.c
> index 267754fdf581469642c4485c28a2b00050fe785f..7050b48c04671759e8cad0e93359c088a2bf342a 100644
> --- a/drivers/perf/fsl_imx9_ddr_perf.c
> +++ b/drivers/perf/fsl_imx9_ddr_perf.c
> @@ -104,6 +104,11 @@ static const struct imx_ddr_devtype_data imx93_devtype_data = {
> .filter_ver = DDR_PERF_AXI_FILTER_V1
> };
>
> +static const struct imx_ddr_devtype_data imx94_devtype_data = {
> + .identifier = "imx94",
> + .filter_ver = DDR_PERF_AXI_FILTER_V2
> +};
> +
> static const struct imx_ddr_devtype_data imx95_devtype_data = {
> .identifier = "imx95",
> .filter_ver = DDR_PERF_AXI_FILTER_V2
> @@ -122,6 +127,7 @@ static inline bool axi_filter_v2(struct ddr_pmu *pmu)
> static const struct of_device_id imx_ddr_pmu_dt_ids[] = {
> { .compatible = "fsl,imx91-ddr-pmu", .data = &imx91_devtype_data },
> { .compatible = "fsl,imx93-ddr-pmu", .data = &imx93_devtype_data },
> + { .compatible = "fsl,imx94-ddr-pmu", .data = &imx94_devtype_data },
> { .compatible = "fsl,imx95-ddr-pmu", .data = &imx95_devtype_data },
> { /* sentinel */ }
> };
>
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 3/5] perf vendor events arm64:: Add i.MX94 DDR Performance Monitor metrics
2025-08-15 9:36 ` [PATCH 3/5] perf vendor events arm64:: Add i.MX94 DDR Performance Monitor metrics Xu Yang
@ 2025-08-15 16:28 ` Frank Li
0 siblings, 0 replies; 13+ messages in thread
From: Frank Li @ 2025-08-15 16:28 UTC (permalink / raw)
To: Xu Yang
Cc: Will Deacon, Mark Rutland, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, John Garry, James Clark, Mike Leach, Leo Yan,
Peter Zijlstra, Ingo Molnar, Arnaldo Carvalho de Melo,
Namhyung Kim, Alexander Shishkin, Jiri Olsa, Ian Rogers,
Adrian Hunter, linux-arm-kernel, linux-perf-users, devicetree,
imx, Peng Fan
On Fri, Aug 15, 2025 at 05:36:29PM +0800, Xu Yang wrote:
> Add JSON metrics for i.MX94 DDR Performance Monitor.
>
> Reviewed-by: Peng Fan <peng.fan@nxp.com>
> Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
> ---
> .../arch/arm64/freescale/imx94/sys/ddrc.json | 9 +
> .../arch/arm64/freescale/imx94/sys/metrics.json | 450 +++++++++++++++++++++
> 2 files changed, 459 insertions(+)
>
> diff --git a/tools/perf/pmu-events/arch/arm64/freescale/imx94/sys/ddrc.json b/tools/perf/pmu-events/arch/arm64/freescale/imx94/sys/ddrc.json
> new file mode 100644
> index 0000000000000000000000000000000000000000..aa7b58721dc7e23dc9d9905a79e0c1778b7bbf11
> --- /dev/null
> +++ b/tools/perf/pmu-events/arch/arm64/freescale/imx94/sys/ddrc.json
> @@ -0,0 +1,9 @@
> +[
> + {
> + "BriefDescription": "ddr cycles event",
> + "EventCode": "0x00",
> + "EventName": "imx94_ddr.cycles",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + }
> +]
> diff --git a/tools/perf/pmu-events/arch/arm64/freescale/imx94/sys/metrics.json b/tools/perf/pmu-events/arch/arm64/freescale/imx94/sys/metrics.json
> new file mode 100644
> index 0000000000000000000000000000000000000000..629f1f52761e2210ef43a9cbba175871817e1230
> --- /dev/null
> +++ b/tools/perf/pmu-events/arch/arm64/freescale/imx94/sys/metrics.json
> @@ -0,0 +1,450 @@
> +[
> + {
> + "BriefDescription": "bandwidth usage for lpddr5 evk board",
> + "MetricName": "imx94_bandwidth_usage.lpddr5",
> + "MetricExpr": "(( imx9_ddr0@eddrtq_pm_rd_beat_filt0\\,axi_mask\\=0x000\\,axi_id\\=0x000@ + imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x000\\,axi_id\\=0x000@ ) * 32 / duration_time) / (4266 * 1000000 * 4)",
> + "ScaleUnit": "1e2%",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bandwidth usage for lpddr4 evk board",
> + "MetricName": "imx94_bandwidth_usage.lpddr4",
> + "MetricExpr": "(( imx9_ddr0@eddrtq_pm_rd_beat_filt0\\,axi_mask\\=0x000\\,axi_id\\=0x000@ + imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x000\\,axi_id\\=0x000@ ) * 32 / duration_time) / (4266 * 1000000 * 4)",
> + "ScaleUnit": "1e2%",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of all masters read from ddr",
> + "MetricName": "imx94_ddr_read.all",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt0\\,axi_mask\\=0x000\\,axi_id\\=0x000@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of all masters write to ddr",
> + "MetricName": "imx94_ddr_write.all",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x000\\,axi_id\\=0x000@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of all a55 read from ddr",
> + "MetricName": "imx94_ddr_read.a55_all",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt1\\,axi_mask\\=0x3fc\\,axi_id\\=0x000@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of all a55 write from ddr",
> + "MetricName": "imx94_ddr_write.a55_all",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x3fc\\,axi_id\\=0x000@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of a55 core 0 read from ddr",
> + "MetricName": "imx94_ddr_read.a55_0",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt2\\,axi_mask\\=0x3ff\\,axi_id\\=0x000@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of a55 core 0 write to ddr",
> + "MetricName": "imx94_ddr_write.a55_0",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x3ff\\,axi_id\\=0x000@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of a55 core 1 read from ddr",
> + "MetricName": "imx94_ddr_read.a55_1",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt0\\,axi_mask\\=0x00f\\,axi_id\\=0x001@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of a55 core 1 write to ddr",
> + "MetricName": "imx94_ddr_write.a55_1",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x001@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of a55 core 2 read from ddr",
> + "MetricName": "imx94_ddr_read.a55_2",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt1\\,axi_mask\\=0x00f\\,axi_id\\=0x002@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of a55 core 2 write to ddr",
> + "MetricName": "imx94_ddr_write.a55_2",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x002@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of a55 core 3 read from ddr",
> + "MetricName": "imx94_ddr_read.a55_3",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt2\\,axi_mask\\=0x00f\\,axi_id\\=0x003@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of a55 core 3 write to ddr",
> + "MetricName": "imx94_ddr_write.a55_3",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x003@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of m7 core1 read from ddr",
> + "MetricName": "imx94_ddr_read.m7_1",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt0\\,axi_mask\\=0x00f\\,axi_id\\=0x004@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of m7 core1 write to ddr",
> + "MetricName": "imx94_ddr_write.m7_1",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x004@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of m33 core1 (in netc) read from ddr",
> + "MetricName": "imx94_ddr_read.m33_1",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt1\\,axi_mask\\=0x00f\\,axi_id\\=0x005@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of m33 core1 (in netc) write to ddr",
> + "MetricName": "imx94_ddr_write.m33_1",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x005@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of pcie2 read from ddr",
> + "MetricName": "imx94_ddr_read.pcie2",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt2\\,axi_mask\\=0x00f\\,axi_id\\=0x006@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of pcie2 write to ddr",
> + "MetricName": "imx94_ddr_write.pcie2",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x006@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of Cortex-A DSU L3 evicted/ACP transactions read from ddr",
> + "MetricName": "imx94_ddr_read.cortex_a_dsu",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt0\\,axi_mask\\=0x00f\\,axi_id\\=0x007@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of Cortex-A DSU L3 evicted/ACP transactions write to ddr",
> + "MetricName": "imx94_ddr_write.cortex_a_dsu",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x007@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of m33 core0 read from ddr",
> + "MetricName": "imx94_ddr_read.m33_0",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt1\\,axi_mask\\=0x00f\\,axi_id\\=0x008@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of m33 core0 write to ddr",
> + "MetricName": "imx94_ddr_write.m33_0",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x008@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of m7 core0 read from ddr",
> + "MetricName": "imx94_ddr_read.m7_0",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt2\\,axi_mask\\=0x00f\\,axi_id\\=0x009@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of m7 core0 write to ddr",
> + "MetricName": "imx94_ddr_write.m7_0",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x009@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of sentinel read from ddr",
> + "MetricName": "imx94_ddr_read.sentinel",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt0\\,axi_mask\\=0x00f\\,axi_id\\=0x00a@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of sentinel write to ddr",
> + "MetricName": "imx94_ddr_write.sentinel",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x00a@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of edma1 read from ddr",
> + "MetricName": "imx94_ddr_read.edma1",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt1\\,axi_mask\\=0x00f\\,axi_id\\=0x00b@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of edma1 write to ddr",
> + "MetricName": "imx94_ddr_write.edma1",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x00b@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of edma2 read from ddr",
> + "MetricName": "imx94_ddr_read.edma2",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt2\\,axi_mask\\=0x00f\\,axi_id\\=0x00c@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of edma2 write to ddr",
> + "MetricName": "imx94_ddr_write.edma2",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x00c@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of netc read from ddr",
> + "MetricName": "imx94_ddr_read.netc",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt0\\,axi_mask\\=0x00f\\,axi_id\\=0x00d@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of netc write to ddr",
> + "MetricName": "imx94_ddr_write.netc",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x00d@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of aonmix read from ddr",
> + "MetricName": "imx94_ddr_read.aonmix",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt2\\,axi_mask\\=0x00f\\,axi_id\\=0x00f@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of aonmix write to ddr",
> + "MetricName": "imx94_ddr_write.aonmix",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x00f@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of npumix read from ddr",
> + "MetricName": "imx94_ddr_read.npumix",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt0\\,axi_mask\\=0x3f0\\,axi_id\\=0x010@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of npumix write to ddr",
> + "MetricName": "imx94_ddr_write.npumix",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x3f0\\,axi_id\\=0x010@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of usdhc1 read from ddr",
> + "MetricName": "imx94_ddr_read.usdhc1",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt1\\,axi_mask\\=0x3f0\\,axi_id\\=0x0b0@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of usdhc1 write to ddr",
> + "MetricName": "imx94_ddr_write.usdhc1",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x3f0\\,axi_id\\=0x0b0@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of usdhc2 read from ddr",
> + "MetricName": "imx94_ddr_read.usdhc2",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt2\\,axi_mask\\=0x3f0\\,axi_id\\=0x0c0@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of usdhc2 write to ddr",
> + "MetricName": "imx94_ddr_write.usdhc2",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x3f0\\,axi_id\\=0x0c0@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of usdhc3 read from ddr",
> + "MetricName": "imx94_ddr_read.usdhc3",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt0\\,axi_mask\\=0x3f0\\,axi_id\\=0x0d0@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of usdhc3 write to ddr",
> + "MetricName": "imx94_ddr_write.usdhc3",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x3f0\\,axi_id\\=0x0d0@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of xspi read from ddr",
> + "MetricName": "imx94_ddr_read.xspi",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt2\\,axi_mask\\=0x3f0\\,axi_id\\=0x0f0@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of xspi write to ddr",
> + "MetricName": "imx94_ddr_write.xspi",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x3f0\\,axi_id\\=0x0f0@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of pcie1 read from ddr",
> + "MetricName": "imx94_ddr_read.pcie1",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt0\\,axi_mask\\=0x3f0\\,axi_id\\=0x100@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of pcie1 write to ddr",
> + "MetricName": "imx94_ddr_write.pcie1",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x3f0\\,axi_id\\=0x100@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of usb1 read from ddr",
> + "MetricName": "imx94_ddr_read.usb1",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt1\\,axi_mask\\=0x3f0\\,axi_id\\=0x140@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of usb1 write to ddr",
> + "MetricName": "imx94_ddr_write.usb1",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x3f0\\,axi_id\\=0x140@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of usb2 read from ddr",
> + "MetricName": "imx94_ddr_read.usb2",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt2\\,axi_mask\\=0x3f0\\,axi_id\\=0x150@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of usb2 write to ddr",
> + "MetricName": "imx94_ddr_write.usb2",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x3f0\\,axi_id\\=0x150@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of pxp read from ddr",
> + "MetricName": "imx94_ddr_read.pxp",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt0\\,axi_mask\\=0x3f0\\,axi_id\\=0x2a0@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of pxp write to ddr",
> + "MetricName": "imx94_ddr_write.pxp",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x3f0\\,axi_id\\=0x2a0@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of dcif read from ddr",
> + "MetricName": "imx94_ddr_read.dcif",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt1\\,axi_mask\\=0x3f0\\,axi_id\\=0x2b0@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + },
> + {
> + "BriefDescription": "bytes of dcif write to ddr",
> + "MetricName": "imx94_ddr_write.dcif",
> + "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x3f0\\,axi_id\\=0x2b0@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx94"
> + }
> +]
>
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 4/5] MAINTAINERS: include fsl_imx9_ddr_perf.c and some perf metric files
2025-08-15 9:36 ` [PATCH 4/5] MAINTAINERS: include fsl_imx9_ddr_perf.c and some perf metric files Xu Yang
@ 2025-08-15 16:28 ` Frank Li
0 siblings, 0 replies; 13+ messages in thread
From: Frank Li @ 2025-08-15 16:28 UTC (permalink / raw)
To: Xu Yang
Cc: Will Deacon, Mark Rutland, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, John Garry, James Clark, Mike Leach, Leo Yan,
Peter Zijlstra, Ingo Molnar, Arnaldo Carvalho de Melo,
Namhyung Kim, Alexander Shishkin, Jiri Olsa, Ian Rogers,
Adrian Hunter, linux-arm-kernel, linux-perf-users, devicetree,
imx
On Fri, Aug 15, 2025 at 05:36:30PM +0800, Xu Yang wrote:
> The fsl_imx9_ddr_perf.c and some perf metric files under
> tools/perf/pmu-events/arch/arm64/freescale/ is missing in MAINTAINERS.
> Add them and add me as another maintainer.
>
> Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
> ---
> MAINTAINERS | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 5eeeef7bf25500987bc1a278758c82c1c68a55a0..163d6591f169d250a77c8c27cc78e0e9b25cefb6 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -9780,11 +9780,14 @@ F: drivers/video/fbdev/imxfb.c
>
> FREESCALE IMX DDR PMU DRIVER
> M: Frank Li <Frank.li@nxp.com>
> +M: Xu Yang <xu.yang_2@nxp.com>
> L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
> S: Maintained
> F: Documentation/admin-guide/perf/imx-ddr.rst
> F: Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml
> F: drivers/perf/fsl_imx8_ddr_perf.c
> +F: drivers/perf/fsl_imx9_ddr_perf.c
> +F: tools/perf/pmu-events/arch/arm64/freescale/
>
> FREESCALE IMX I2C DRIVER
> M: Oleksij Rempel <o.rempel@pengutronix.de>
>
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 5/5] arm64: dts: imx94: add DDR Perf Monitor node
2025-08-15 9:36 ` [PATCH 5/5] arm64: dts: imx94: add DDR Perf Monitor node Xu Yang
@ 2025-08-15 16:30 ` Frank Li
2025-08-18 7:57 ` Xu Yang
0 siblings, 1 reply; 13+ messages in thread
From: Frank Li @ 2025-08-15 16:30 UTC (permalink / raw)
To: Xu Yang
Cc: Will Deacon, Mark Rutland, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, John Garry, James Clark, Mike Leach, Leo Yan,
Peter Zijlstra, Ingo Molnar, Arnaldo Carvalho de Melo,
Namhyung Kim, Alexander Shishkin, Jiri Olsa, Ian Rogers,
Adrian Hunter, linux-arm-kernel, linux-perf-users, devicetree,
imx
On Fri, Aug 15, 2025 at 05:36:31PM +0800, Xu Yang wrote:
> Add DDR Perf Monitor for i.MX95.
typo, should be i.MX94
Frank
>
> Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
> ---
> arch/arm64/boot/dts/freescale/imx94.dtsi | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx94.dtsi b/arch/arm64/boot/dts/freescale/imx94.dtsi
> index 44dee2cbd42d4bc765c33a9ce663ceda095b6c66..6a2d86d67200facec76a7880b4a2268b4191452c 100644
> --- a/arch/arm64/boot/dts/freescale/imx94.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx94.dtsi
> @@ -1188,5 +1188,11 @@ wdog3: watchdog@49220000 {
> status = "disabled";
> };
> };
> +
> + ddr-pmu@4e090dc0 {
> + compatible = "fsl,imx94-ddr-pmu", "fsl,imx93-ddr-pmu";
> + reg = <0x0 0x4e090dc0 0x0 0x200>;
> + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
> + };
> };
> };
>
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 1/5] dt-bindings: perf: fsl-imx-ddr: Add i.MX94 compatible
2025-08-15 16:26 ` Frank Li
@ 2025-08-15 16:34 ` Conor Dooley
0 siblings, 0 replies; 13+ messages in thread
From: Conor Dooley @ 2025-08-15 16:34 UTC (permalink / raw)
To: Frank Li
Cc: Xu Yang, Will Deacon, Mark Rutland, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, John Garry, James Clark,
Mike Leach, Leo Yan, Peter Zijlstra, Ingo Molnar,
Arnaldo Carvalho de Melo, Namhyung Kim, Alexander Shishkin,
Jiri Olsa, Ian Rogers, Adrian Hunter, linux-arm-kernel,
linux-perf-users, devicetree, imx, Peng Fan
[-- Attachment #1: Type: text/plain, Size: 406 bytes --]
On Fri, Aug 15, 2025 at 12:26:29PM -0400, Frank Li wrote:
> On Fri, Aug 15, 2025 at 05:36:27PM +0800, Xu Yang wrote:
> > i.MX94 has a DDR Performance Monitor Unit which is compatible with i.MX93.
> > This will add a compatible for i.MX94.
>
> Add a compatible string fsl,imx94-ddr-pmu for i.MX94
>
> Reviewed-by: Frank Li <Frank.Li@nxp.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 5/5] arm64: dts: imx94: add DDR Perf Monitor node
2025-08-15 16:30 ` Frank Li
@ 2025-08-18 7:57 ` Xu Yang
0 siblings, 0 replies; 13+ messages in thread
From: Xu Yang @ 2025-08-18 7:57 UTC (permalink / raw)
To: Frank Li
Cc: Will Deacon, Mark Rutland, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, John Garry, James Clark, Mike Leach, Leo Yan,
Peter Zijlstra, Ingo Molnar, Arnaldo Carvalho de Melo,
Namhyung Kim, Alexander Shishkin, Jiri Olsa, Ian Rogers,
Adrian Hunter, linux-arm-kernel, linux-perf-users, devicetree,
imx
On Fri, Aug 15, 2025 at 12:30:02PM -0400, Frank Li wrote:
> On Fri, Aug 15, 2025 at 05:36:31PM +0800, Xu Yang wrote:
> > Add DDR Perf Monitor for i.MX95.
>
> typo, should be i.MX94
Thanks, I will correct it later.
Thanks,
Xu Yang
>
> Frank
> >
> > Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
> > ---
> > arch/arm64/boot/dts/freescale/imx94.dtsi | 6 ++++++
> > 1 file changed, 6 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx94.dtsi b/arch/arm64/boot/dts/freescale/imx94.dtsi
> > index 44dee2cbd42d4bc765c33a9ce663ceda095b6c66..6a2d86d67200facec76a7880b4a2268b4191452c 100644
> > --- a/arch/arm64/boot/dts/freescale/imx94.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx94.dtsi
> > @@ -1188,5 +1188,11 @@ wdog3: watchdog@49220000 {
> > status = "disabled";
> > };
> > };
> > +
> > + ddr-pmu@4e090dc0 {
> > + compatible = "fsl,imx94-ddr-pmu", "fsl,imx93-ddr-pmu";
> > + reg = <0x0 0x4e090dc0 0x0 0x200>;
> > + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
> > + };
> > };
> > };
> >
> > --
> > 2.34.1
> >
^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2025-08-18 8:02 UTC | newest]
Thread overview: 13+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-08-15 9:36 [PATCH 0/5] add imx94 DDR Performance Monitor support Xu Yang
2025-08-15 9:36 ` [PATCH 1/5] dt-bindings: perf: fsl-imx-ddr: Add i.MX94 compatible Xu Yang
2025-08-15 16:26 ` Frank Li
2025-08-15 16:34 ` Conor Dooley
2025-08-15 9:36 ` [PATCH 2/5] perf: imx_perf: add support for i.MX94 platform Xu Yang
2025-08-15 16:27 ` Frank Li
2025-08-15 9:36 ` [PATCH 3/5] perf vendor events arm64:: Add i.MX94 DDR Performance Monitor metrics Xu Yang
2025-08-15 16:28 ` Frank Li
2025-08-15 9:36 ` [PATCH 4/5] MAINTAINERS: include fsl_imx9_ddr_perf.c and some perf metric files Xu Yang
2025-08-15 16:28 ` Frank Li
2025-08-15 9:36 ` [PATCH 5/5] arm64: dts: imx94: add DDR Perf Monitor node Xu Yang
2025-08-15 16:30 ` Frank Li
2025-08-18 7:57 ` Xu Yang
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