[PATCH v2 00/11] arm64: dts: imx95: various updates

[PATCH v2 00/11] arm64: dts: imx95: various updates

[Peng Fan]

This patchset is to upstream various downstream changes.
- Correct edma channel for lpuart7/8
- Add System Counter, SCMI LMM/CPU, V2X MU, coresight nodes
- Update alias
- Add pca9632, pf09/pf53 thermal and etc.

dtbs_check will report a few failures, such as linux,code, db suffix.
The failures are not related to this patchset.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
Changes in v2:
- Drop patch 8 because dt-bindings not ready, and patch 12
- Per Frank's comments: Typo fixes, node name updates, sort properties
- Add R-b from Frank
- There is still dtbs_check error, but not related to this patchset, it
is because https://lore.kernel.org/imx/20250718094723.3680482-1-peng.fan@nxp.com/
not applied.
- Link to v1: https://lore.kernel.org/r/20250815-imx9-dts-v1-0-e609eb4e3105@nxp.com

---
Joy Zou (1):
      arm64: dts: imx95: Correct the lpuart7 and lpuart8 srcid

Luke Wang (1):
      arm64: dts: imx95-15x15-evk: Change pinctrl settings for usdhc2

Peng Fan (8):
      arm64: dts: imx95: Add System Counter node
      arm64: dts: imx95: Add LMM/CPU nodes
      arm64: dts: imx95: Add more V2X MUs
      arm64: dts: imx95: Add OCOTP node
      arm64: dts: imx95: Add coresight nodes
      arm64: dts: imx95-evk: Update alias
      arm64: dts: imx95-19x19-evk: Add pca9632 node
      arm64: dts: imx95-19x19-evk: Add pf09 and pf53 thermal zones

Richard Zhu (1):
      arm64: dts: imx95-19x19-evk: Add Tsettle delay in m2 regulator

 arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts |  29 +++-
 arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts |  94 ++++++++++++
 arch/arm64/boot/dts/freescale/imx95.dtsi          | 165 +++++++++++++++++++++-
 3 files changed, 280 insertions(+), 8 deletions(-)
---
base-commit: ff837884a4642382a24d10fd503acf2c3a472f10
change-id: 20250813-imx9-dts-664f7ba66ae7

Best regards,
-- 
Peng Fan <peng.fan@nxp.com>

[PATCH v2 01/11] arm64: dts: imx95: Correct the lpuart7 and lpuart8 srcid

[Peng Fan]

From: Joy Zou <joy.zou@nxp.com>

According to the imx95 RM, the lpuart7 rx and tx DMA's srcid are 88 and 87,
and the lpuart8 rx and tx DMA's srcid are 90 and 89. So correct them.

Fixes: 915fd2e127e8 ("arm64: dts: imx95: add edma[1..3] nodes")
Signed-off-by: Joy Zou <joy.zou@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx95.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
index 4ca6a7ea586eaa5fbbaa56be8b821f7c929b7dc4..dbcc557d07f5b8a0ef27d68b7211b07d26fdb9bc 100644
--- a/arch/arm64/boot/dts/freescale/imx95.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
@@ -913,7 +913,7 @@ lpuart7: serial@42690000 {
 				interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
 				clocks = <&scmi_clk IMX95_CLK_LPUART7>;
 				clock-names = "ipg";
-				dmas = <&edma2 26 0 FSL_EDMA_RX>, <&edma2 25 0 0>;
+				dmas = <&edma2 88 0 FSL_EDMA_RX>, <&edma2 87 0 0>;
 				dma-names = "rx", "tx";
 				status = "disabled";
 			};
@@ -925,7 +925,7 @@ lpuart8: serial@426a0000 {
 				interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 				clocks = <&scmi_clk IMX95_CLK_LPUART8>;
 				clock-names = "ipg";
-				dmas = <&edma2 28 0 FSL_EDMA_RX>, <&edma2 27 0 0>;
+				dmas = <&edma2 90 0 FSL_EDMA_RX>, <&edma2 89 0 0>;
 				dma-names = "rx", "tx";
 				status = "disabled";
 			};

-- 
2.37.1

[PATCH v2 02/11] arm64: dts: imx95: Add System Counter node

[Peng Fan]

Add System Counter node to support cpuidle when arm generic timer stops

Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx95.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
index dbcc557d07f5b8a0ef27d68b7211b07d26fdb9bc..642dc4b7a4770be50960f53a73db965ea4374e24 100644
--- a/arch/arm64/boot/dts/freescale/imx95.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
@@ -1260,6 +1260,15 @@ mu1: mailbox@44220000 {
 				status = "disabled";
 			};
 
+			system_counter: timer@44290000 {
+				compatible = "nxp,imx95-sysctr-timer";
+				reg = <0x44290000 0x30000>;
+				interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&osc_24m>;
+				clock-names = "per";
+				nxp,no-divider;
+			};
+
 			tpm1: pwm@44310000 {
 				compatible = "fsl,imx7ulp-pwm";
 				reg = <0x44310000 0x1000>;

-- 
2.37.1

[PATCH v2 03/11] arm64: dts: imx95: Add LMM/CPU nodes

[Peng Fan]

Add SCMI LMM and CPU nodes for managing Logical Machine and CPU.

Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx95.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
index 642dc4b7a4770be50960f53a73db965ea4374e24..e20feb1bcec6088949e7dd1ab2fc1c108393fb81 100644
--- a/arch/arm64/boot/dts/freescale/imx95.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
@@ -351,10 +351,18 @@ scmi_iomuxc: protocol@19 {
 				reg = <0x19>;
 			};
 
+			scmi_lmm: protocol@80 {
+				reg = <0x80>;
+			};
+
 			scmi_bbm: protocol@81 {
 				reg = <0x81>;
 			};
 
+			scmi_cpu: protocol@82 {
+				reg = <0x82>;
+			};
+
 			scmi_misc: protocol@84 {
 				reg = <0x84>;
 			};

-- 
2.37.1

[PATCH v2 04/11] arm64: dts: imx95: Add more V2X MUs

[Peng Fan]

Add more MUs for V2X communication

Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx95.dtsi | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
index e20feb1bcec6088949e7dd1ab2fc1c108393fb81..02c0422a7aa3877c8431c9b050d85f43f5ed7bde 100644
--- a/arch/arm64/boot/dts/freescale/imx95.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
@@ -1500,6 +1500,13 @@ mu6: mailbox@44630000 {
 			};
 		};
 
+		mailbox@47300000 {
+			compatible = "fsl,imx95-mu-v2x";
+			reg = <0x0 0x47300000 0x0 0x10000>;
+			interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+			#mbox-cells = <2>;
+		};
+
 		mailbox@47320000 {
 			compatible = "fsl,imx95-mu-v2x";
 			reg = <0x0 0x47320000 0x0 0x10000>;
@@ -1507,6 +1514,20 @@ mailbox@47320000 {
 			#mbox-cells = <2>;
 		};
 
+		mailbox@47330000 {
+			compatible = "fsl,imx95-mu-v2x";
+			reg = <0x0 0x47330000 0x0 0x10000>;
+			interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+			#mbox-cells = <2>;
+		};
+
+		mailbox@47340000 {
+			compatible = "fsl,imx95-mu-v2x";
+			reg = <0x0 0x47340000 0x0 0x10000>;
+			interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
+			#mbox-cells = <2>;
+		};
+
 		mailbox@47350000 {
 			compatible = "fsl,imx95-mu-v2x";
 			reg = <0x0 0x47350000 0x0 0x10000>;

-- 
2.37.1

[PATCH v2 05/11] arm64: dts: imx95: Add OCOTP node

[Peng Fan]

Add OCOTP node to allow reading fuse using nvmem API

Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx95.dtsi | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
index 02c0422a7aa3877c8431c9b050d85f43f5ed7bde..adc63448aa15b148ca0eb8499ff5bc217fe8208e 100644
--- a/arch/arm64/boot/dts/freescale/imx95.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
@@ -1553,6 +1553,25 @@ gpio1: gpio@47400000 {
 			status = "disabled";
 		};
 
+		ocotp: efuse@47510000 {
+			compatible = "fsl,imx95-ocotp", "syscon";
+			reg = <0x0 0x47510000 0x0 0x10000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			eth_mac0: mac-address@0 {
+				reg = <0x0514 0x6>;
+			};
+
+			eth_mac1: mac-address@1 {
+				reg = <0x1514 0x6>;
+			};
+
+			eth_mac2: mac-address@2 {
+				reg = <0x2514 0x6>;
+			};
+		};
+
 		elemu0: mailbox@47520000 {
 			compatible = "fsl,imx95-mu-ele";
 			reg = <0x0 0x47520000 0x0 0x10000>;

-- 
2.37.1

[PATCH v2 06/11] arm64: dts: imx95: Add coresight nodes

[Peng Fan]

Add etf, etm, etr, funnel nodes for coresight.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx95.dtsi | 104 +++++++++++++++++++++++++++++++
 1 file changed, 104 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
index adc63448aa15b148ca0eb8499ff5bc217fe8208e..56d782f423bbba6b38bc51369ab9535e8da2eae4 100644
--- a/arch/arm64/boot/dts/freescale/imx95.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
@@ -492,6 +492,110 @@ soc {
 		#size-cells = <2>;
 		ranges;
 
+		etm0: etm@40840000 {
+			compatible = "arm,coresight-etm4x", "arm,primecell";
+			reg = <0x0 0x40840000 0x0 0x10000>;
+			arm,primecell-periphid = <0xbb95d>;
+			cpu = <&A55_0>;
+			clocks = <&scmi_clk IMX95_CLK_A55PERIPH>;
+			clock-names = "apb_pclk";
+			status = "disabled";
+
+			out-ports {
+				port {
+					etm0_out_port: endpoint {
+						remote-endpoint = <&ca_funnel_in_port0>;
+					};
+				};
+			};
+		};
+
+		funnel0: funnel {
+			/*
+			 * non-configurable funnel don't show up on the AMBA
+			 * bus.  As such no need to add "arm,primecell".
+			 */
+			compatible = "arm,coresight-static-funnel";
+			status = "disabled";
+
+			in-ports {
+				port {
+					ca_funnel_in_port0: endpoint {
+						remote-endpoint = <&etm0_out_port>;
+					};
+				};
+			};
+
+			out-ports {
+				port {
+					ca_funnel_out_port0: endpoint {
+						remote-endpoint = <&hugo_funnel_in_port0>;
+					};
+				};
+			};
+		};
+
+		funnel1: funnel-sys {
+			compatible = "arm,coresight-static-funnel";
+			status = "disabled";
+
+			in-ports {
+				port {
+					hugo_funnel_in_port0: endpoint {
+						remote-endpoint = <&ca_funnel_out_port0>;
+					};
+				};
+			};
+
+			out-ports {
+				port {
+					hugo_funnel_out_port0: endpoint {
+						remote-endpoint = <&etf_in_port>;
+					};
+				};
+			};
+		};
+
+		etf: etf@41030000 {
+			compatible = "arm,coresight-tmc", "arm,primecell";
+			reg = <0x0 0x41030000 0x0 0x1000>;
+			clocks = <&scmi_clk IMX95_CLK_A55PERIPH>;
+			clock-names = "apb_pclk";
+			status = "disabled";
+
+			in-ports {
+				port {
+					etf_in_port: endpoint {
+						remote-endpoint = <&hugo_funnel_out_port0>;
+					};
+				};
+			};
+
+			out-ports {
+				port {
+					etf_out_port: endpoint {
+						remote-endpoint = <&etr_in_port>;
+					};
+				};
+			};
+		};
+
+		etr: etr@41040000 {
+			compatible = "arm,coresight-tmc", "arm,primecell";
+			reg = <0x0 0x41040000 0x0 0x1000>;
+			clocks = <&scmi_clk IMX95_CLK_A55PERIPH>;
+			clock-names = "apb_pclk";
+			status = "disabled";
+
+			in-ports {
+				port {
+					etr_in_port: endpoint {
+						remote-endpoint = <&etf_out_port>;
+					};
+				};
+			};
+		};
+
 		aips2: bus@42000000 {
 			compatible = "fsl,aips-bus", "simple-bus";
 			reg = <0x0 0x42000000 0x0 0x800000>;

-- 
2.37.1

[PATCH v2 07/11] arm64: dts: imx95-evk: Update alias

[Peng Fan]

Add i2c, gpio, mmc, serial alias for 15x15 EVK and add lpuart5 serial
alias for 19x19 EVK.

Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts | 17 +++++++++++++++++
 arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts |  1 +
 2 files changed, 18 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts b/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
index 46f6e0fbf2b09106e6e726ff8b61522d1359cfa4..de7f4321e5f9d7d6a6c46741d3710756dd2b69cf 100644
--- a/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
@@ -28,7 +28,24 @@ / {
 	aliases {
 		ethernet0 = &enetc_port0;
 		ethernet1 = &enetc_port1;
+		gpio0 = &gpio1;
+		gpio1 = &gpio2;
+		gpio2 = &gpio3;
+		gpio3 = &gpio4;
+		gpio4 = &gpio5;
+		i2c0 = &lpi2c1;
+		i2c1 = &lpi2c2;
+		i2c2 = &lpi2c3;
+		i2c3 = &lpi2c4;
+		i2c4 = &lpi2c5;
+		i2c5 = &lpi2c6;
+		i2c6 = &lpi2c7;
+		i2c7 = &lpi2c8;
+		mmc0 = &usdhc1;
+		mmc1 = &usdhc2;
+		mmc2 = &usdhc3;
 		serial0 = &lpuart1;
+		serial4 = &lpuart5;
 	};
 
 	bt_sco_codec: bt-sco-codec {
diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
index 2f949a0d48d2d8066388884703c3b3cd678f16e1..39815b21d235d2f8cfa49720d3be49d056ea039a 100644
--- a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
@@ -40,6 +40,7 @@ aliases {
 		mmc0 = &usdhc1;
 		mmc1 = &usdhc2;
 		serial0 = &lpuart1;
+		serial4 = &lpuart5;
 	};
 
 	bt_sco_codec: audio-codec-bt-sco {

-- 
2.37.1

[PATCH v2 08/11] arm64: dts: imx95-19x19-evk: Add Tsettle delay in m2 regulator

[Peng Fan]

From: Richard Zhu <hongxing.zhu@nxp.com>

M.2 device only can be enabled after all Power Rails reach their minimum
operating voltage (PCI Express M.2 Specification r5.1 3.1.4 Power-up
Timing). Set a delay equal to the max value of Tsettle in m2 regulator.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
index 39815b21d235d2f8cfa49720d3be49d056ea039a..6d2f09404bdb8bee62532f1e02f59bd5a899833e 100644
--- a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
@@ -136,6 +136,13 @@ reg_m2_pwr: regulator-m2-pwr {
 		regulator-max-microvolt = <3300000>;
 		gpio = <&i2c7_pcal6524 20 GPIO_ACTIVE_HIGH>;
 		enable-active-high;
+		/*
+		 * M.2 device only can be enabled(W_DISABLE1#) after all Power
+		 * Rails reach their minimum operating voltage (PCI Express M.2
+		 * Specification r5.1 3.1.4 Power-up Timing).
+		 * Set a delay equal to the max value of Tsettle here.
+		 */
+		startup-delay-us = <5000>;
 	};
 
 	reg_pcie0: regulator-pcie {

-- 
2.37.1

[PATCH v2 09/11] arm64: dts: imx95-19x19-evk: Add pca9632 node

[Peng Fan]

Add an I2C controlled 4-bit LED driver PCA9632 under lpi2c3.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
index 6d2f09404bdb8bee62532f1e02f59bd5a899833e..11393bd57582dd9097732c84e6281be2662145f7 100644
--- a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
@@ -310,6 +310,19 @@ i2c3_gpio_expander_20: gpio@20 {
 		reg = <0x20>;
 		vcc-supply = <&reg_3p3v>;
 	};
+
+	pca9632: pca9632@62 {
+		compatible = "nxp,pca9632";
+		reg = <0x62>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		led_baclklight: led@0 {
+			reg = <0>;
+			label = "backlight";
+			linux,default-trigger = "none";
+		};
+	};
 };
 
 &lpi2c4 {

-- 
2.37.1

[PATCH v2 10/11] arm64: dts: imx95-19x19-evk: Add pf09 and pf53 thermal zones

[Peng Fan]

System Manager supports reading out pf09 and pf53 temperature and
SCMI Agent could get the values through SCMI sensor protocol. So add
the nodes to allow Linux to get the temperature.

Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts | 73 +++++++++++++++++++++++
 1 file changed, 73 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
index 11393bd57582dd9097732c84e6281be2662145f7..d0c7c9fa43beda4aed83c4b4ecfc4e7f65ae0386 100644
--- a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
@@ -1058,6 +1058,79 @@ map3 {
 			};
 		};
 	};
+
+	pf09-thermal {
+		polling-delay = <2000>;
+		polling-delay-passive = <250>;
+		thermal-sensors = <&scmi_sensor 2>;
+
+		trips {
+			pf09_alert: trip0 {
+				hysteresis = <2000>;
+				temperature = <140000>;
+				type = "passive";
+			};
+
+			pf09_crit: trip1 {
+				hysteresis = <2000>;
+				temperature = <155000>;
+				type = "critical";
+			};
+		};
+	};
+
+	pf53arm-thermal {
+		polling-delay = <2000>;
+		polling-delay-passive = <250>;
+		thermal-sensors = <&scmi_sensor 4>;
+
+		cooling-maps {
+			map0 {
+				trip = <&pf5301_alert>;
+				cooling-device =
+					<&A55_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+					<&A55_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+					<&A55_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+					<&A55_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+					<&A55_4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+					<&A55_5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+			};
+		};
+
+		trips {
+			pf5301_alert: trip0 {
+				hysteresis = <2000>;
+				temperature = <140000>;
+				type = "passive";
+			};
+
+			pf5301_crit: trip1 {
+				hysteresis = <2000>;
+				temperature = <155000>;
+				type = "critical";
+			};
+		};
+	};
+
+	pf53soc-thermal {
+		polling-delay = <2000>;
+		polling-delay-passive = <250>;
+		thermal-sensors = <&scmi_sensor 3>;
+
+		trips {
+			pf5302_alert: trip0 {
+				hysteresis = <2000>;
+				temperature = <140000>;
+				type = "passive";
+			};
+
+			pf5302_crit: trip1 {
+				hysteresis = <2000>;
+				temperature = <155000>;
+				type = "critical";
+			};
+		};
+	};
 };
 
 &tpm6 {

-- 
2.37.1

[PATCH v2 11/11] arm64: dts: imx95-15x15-evk: Change pinctrl settings for usdhc2

[Peng Fan]

From: Luke Wang <ziniu.wang_1@nxp.com>

The drive strength is too high for SDR104 mode. Change the drive
strength to X3 as hardware team recommends.

Signed-off-by: Luke Wang <ziniu.wang_1@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts b/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
index de7f4321e5f9d7d6a6c46741d3710756dd2b69cf..3c23022923e68fe0f5205d322ad6f8834a46dc56 100644
--- a/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
@@ -881,12 +881,12 @@ IMX95_PAD_SD2_VSELECT__USDHC2_VSELECT			0x51e
 
 	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
 		fsl,pins = <
-			IMX95_PAD_SD2_CLK__USDHC2_CLK				0x15fe
-			IMX95_PAD_SD2_CMD__USDHC2_CMD				0x13fe
-			IMX95_PAD_SD2_DATA0__USDHC2_DATA0			0x13fe
-			IMX95_PAD_SD2_DATA1__USDHC2_DATA1			0x13fe
-			IMX95_PAD_SD2_DATA2__USDHC2_DATA2			0x13fe
-			IMX95_PAD_SD2_DATA3__USDHC2_DATA3			0x13fe
+			IMX95_PAD_SD2_CLK__USDHC2_CLK				0x158e
+			IMX95_PAD_SD2_CMD__USDHC2_CMD				0x138e
+			IMX95_PAD_SD2_DATA0__USDHC2_DATA0			0x138e
+			IMX95_PAD_SD2_DATA1__USDHC2_DATA1			0x138e
+			IMX95_PAD_SD2_DATA2__USDHC2_DATA2			0x138e
+			IMX95_PAD_SD2_DATA3__USDHC2_DATA3			0x138e
 			IMX95_PAD_SD2_VSELECT__USDHC2_VSELECT			0x51e
 		>;
 	};

-- 
2.37.1

Re: [PATCH v2 01/11] arm64: dts: imx95: Correct the lpuart7 and lpuart8 srcid

[Frank Li]

On Mon, Aug 18, 2025 at 09:25:31AM +0800, Peng Fan wrote:
> From: Joy Zou <joy.zou@nxp.com>
>
> According to the imx95 RM, the lpuart7 rx and tx DMA's srcid are 88 and 87,
> and the lpuart8 rx and tx DMA's srcid are 90 and 89. So correct them.
>
> Fixes: 915fd2e127e8 ("arm64: dts: imx95: add edma[1..3] nodes")
> Signed-off-by: Joy Zou <joy.zou@nxp.com>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---

Reviewed-by: Frank Li <Frank.Li@nxp.com>

>  arch/arm64/boot/dts/freescale/imx95.dtsi | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
> index 4ca6a7ea586eaa5fbbaa56be8b821f7c929b7dc4..dbcc557d07f5b8a0ef27d68b7211b07d26fdb9bc 100644
> --- a/arch/arm64/boot/dts/freescale/imx95.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
> @@ -913,7 +913,7 @@ lpuart7: serial@42690000 {
>  				interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
>  				clocks = <&scmi_clk IMX95_CLK_LPUART7>;
>  				clock-names = "ipg";
> -				dmas = <&edma2 26 0 FSL_EDMA_RX>, <&edma2 25 0 0>;
> +				dmas = <&edma2 88 0 FSL_EDMA_RX>, <&edma2 87 0 0>;
>  				dma-names = "rx", "tx";
>  				status = "disabled";
>  			};
> @@ -925,7 +925,7 @@ lpuart8: serial@426a0000 {
>  				interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
>  				clocks = <&scmi_clk IMX95_CLK_LPUART8>;
>  				clock-names = "ipg";
> -				dmas = <&edma2 28 0 FSL_EDMA_RX>, <&edma2 27 0 0>;
> +				dmas = <&edma2 90 0 FSL_EDMA_RX>, <&edma2 89 0 0>;
>  				dma-names = "rx", "tx";
>  				status = "disabled";
>  			};
>
> --
> 2.37.1
>

Re: [PATCH v2 06/11] arm64: dts: imx95: Add coresight nodes

[Frank Li]

On Mon, Aug 18, 2025 at 09:25:36AM +0800, Peng Fan wrote:
> Add etf, etm, etr, funnel nodes for coresight.
>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---

Reviewed-by: Frank Li <Frank.Li@nxp.com>

>  arch/arm64/boot/dts/freescale/imx95.dtsi | 104 +++++++++++++++++++++++++++++++
>  1 file changed, 104 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
> index adc63448aa15b148ca0eb8499ff5bc217fe8208e..56d782f423bbba6b38bc51369ab9535e8da2eae4 100644
> --- a/arch/arm64/boot/dts/freescale/imx95.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
> @@ -492,6 +492,110 @@ soc {
>  		#size-cells = <2>;
>  		ranges;
>
> +		etm0: etm@40840000 {
> +			compatible = "arm,coresight-etm4x", "arm,primecell";
> +			reg = <0x0 0x40840000 0x0 0x10000>;
> +			arm,primecell-periphid = <0xbb95d>;
> +			cpu = <&A55_0>;
> +			clocks = <&scmi_clk IMX95_CLK_A55PERIPH>;
> +			clock-names = "apb_pclk";
> +			status = "disabled";
> +
> +			out-ports {
> +				port {
> +					etm0_out_port: endpoint {
> +						remote-endpoint = <&ca_funnel_in_port0>;
> +					};
> +				};
> +			};
> +		};
> +
> +		funnel0: funnel {
> +			/*
> +			 * non-configurable funnel don't show up on the AMBA
> +			 * bus.  As such no need to add "arm,primecell".
> +			 */
> +			compatible = "arm,coresight-static-funnel";
> +			status = "disabled";
> +
> +			in-ports {
> +				port {
> +					ca_funnel_in_port0: endpoint {
> +						remote-endpoint = <&etm0_out_port>;
> +					};
> +				};
> +			};
> +
> +			out-ports {
> +				port {
> +					ca_funnel_out_port0: endpoint {
> +						remote-endpoint = <&hugo_funnel_in_port0>;
> +					};
> +				};
> +			};
> +		};
> +
> +		funnel1: funnel-sys {
> +			compatible = "arm,coresight-static-funnel";
> +			status = "disabled";
> +
> +			in-ports {
> +				port {
> +					hugo_funnel_in_port0: endpoint {
> +						remote-endpoint = <&ca_funnel_out_port0>;
> +					};
> +				};
> +			};
> +
> +			out-ports {
> +				port {
> +					hugo_funnel_out_port0: endpoint {
> +						remote-endpoint = <&etf_in_port>;
> +					};
> +				};
> +			};
> +		};
> +
> +		etf: etf@41030000 {
> +			compatible = "arm,coresight-tmc", "arm,primecell";
> +			reg = <0x0 0x41030000 0x0 0x1000>;
> +			clocks = <&scmi_clk IMX95_CLK_A55PERIPH>;
> +			clock-names = "apb_pclk";
> +			status = "disabled";
> +
> +			in-ports {
> +				port {
> +					etf_in_port: endpoint {
> +						remote-endpoint = <&hugo_funnel_out_port0>;
> +					};
> +				};
> +			};
> +
> +			out-ports {
> +				port {
> +					etf_out_port: endpoint {
> +						remote-endpoint = <&etr_in_port>;
> +					};
> +				};
> +			};
> +		};
> +
> +		etr: etr@41040000 {
> +			compatible = "arm,coresight-tmc", "arm,primecell";
> +			reg = <0x0 0x41040000 0x0 0x1000>;
> +			clocks = <&scmi_clk IMX95_CLK_A55PERIPH>;
> +			clock-names = "apb_pclk";
> +			status = "disabled";
> +
> +			in-ports {
> +				port {
> +					etr_in_port: endpoint {
> +						remote-endpoint = <&etf_out_port>;
> +					};
> +				};
> +			};
> +		};
> +
>  		aips2: bus@42000000 {
>  			compatible = "fsl,aips-bus", "simple-bus";
>  			reg = <0x0 0x42000000 0x0 0x800000>;
>
> --
> 2.37.1
>

Re: [PATCH v2 00/11] arm64: dts: imx95: various updates

[Rob Herring (Arm)]

On Mon, 18 Aug 2025 09:25:30 +0800, Peng Fan wrote:
> This patchset is to upstream various downstream changes.
> - Correct edma channel for lpuart7/8
> - Add System Counter, SCMI LMM/CPU, V2X MU, coresight nodes
> - Update alias
> - Add pca9632, pf09/pf53 thermal and etc.
> 
> dtbs_check will report a few failures, such as linux,code, db suffix.
> The failures are not related to this patchset.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
> Changes in v2:
> - Drop patch 8 because dt-bindings not ready, and patch 12
> - Per Frank's comments: Typo fixes, node name updates, sort properties
> - Add R-b from Frank
> - There is still dtbs_check error, but not related to this patchset, it
> is because https://lore.kernel.org/imx/20250718094723.3680482-1-peng.fan@nxp.com/
> not applied.
> - Link to v1: https://lore.kernel.org/r/20250815-imx9-dts-v1-0-e609eb4e3105@nxp.com
> 
> ---
> Joy Zou (1):
>       arm64: dts: imx95: Correct the lpuart7 and lpuart8 srcid
> 
> Luke Wang (1):
>       arm64: dts: imx95-15x15-evk: Change pinctrl settings for usdhc2
> 
> Peng Fan (8):
>       arm64: dts: imx95: Add System Counter node
>       arm64: dts: imx95: Add LMM/CPU nodes
>       arm64: dts: imx95: Add more V2X MUs
>       arm64: dts: imx95: Add OCOTP node
>       arm64: dts: imx95: Add coresight nodes
>       arm64: dts: imx95-evk: Update alias
>       arm64: dts: imx95-19x19-evk: Add pca9632 node
>       arm64: dts: imx95-19x19-evk: Add pf09 and pf53 thermal zones
> 
> Richard Zhu (1):
>       arm64: dts: imx95-19x19-evk: Add Tsettle delay in m2 regulator
> 
>  arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts |  29 +++-
>  arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts |  94 ++++++++++++
>  arch/arm64/boot/dts/freescale/imx95.dtsi          | 165 +++++++++++++++++++++-
>  3 files changed, 280 insertions(+), 8 deletions(-)
> ---
> base-commit: ff837884a4642382a24d10fd503acf2c3a472f10
> change-id: 20250813-imx9-dts-664f7ba66ae7
> 
> Best regards,
> --
> Peng Fan <peng.fan@nxp.com>
> 
> 
> 


My bot found new DTB warnings on the .dts files added or changed in this
series.

Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
are fixed by another series. Ultimately, it is up to the platform
maintainer whether these warnings are acceptable or not. No need to reply
unless the platform maintainer has comments.

If you already ran DT checks and didn't see these error(s), then
make sure dt-schema is up to date:

  pip3 install dtschema --upgrade


This patch series was applied (using b4) to base:
 Base: base-commit ff837884a4642382a24d10fd503acf2c3a472f10 not known, ignoring
 Base: attempting to guess base-commit...
 Base: tags/next-20250818 (exact match)

If this is not the correct base, please add 'base-commit' tag
(or use b4 which does this automatically)

New warnings running 'make CHECK_DTBS=y for arch/arm64/boot/dts/freescale/' for 20250818-imx9-dts-v2-0-8ba787fb5280@nxp.com:

arch/arm64/boot/dts/freescale/imx95-tqma9596sa-mb-smarc-2.dtb: scmi (arm,scmi): Unevaluated properties are not allowed ('protocol@80', 'protocol@81', 'protocol@82', 'protocol@84' were unexpected)
	from schema $id: http://devicetree.org/schemas/firmware/arm,scmi.yaml#

RE: [PATCH v2 00/11] arm64: dts: imx95: various updates

[Peng Fan]

> Subject: Re: [PATCH v2 00/11] arm64: dts: imx95: various updates
> 
> 
> On Mon, 18 Aug 2025 09:25:30 +0800, Peng Fan wrote:
> > This patchset is to upstream various downstream changes.
> > - Correct edma channel for lpuart7/8
> > - Add System Counter, SCMI LMM/CPU, V2X MU, coresight nodes
> > - Update alias
> > - Add pca9632, pf09/pf53 thermal and etc.
> >
> > dtbs_check will report a few failures, such as linux,code, db suffix.
> > The failures are not related to this patchset.
> >
> > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > ---
> > Changes in v2:
> > - Drop patch 8 because dt-bindings not ready, and patch 12
> > - Per Frank's comments: Typo fixes, node name updates, sort
> properties
> > - Add R-b from Frank
> > - There is still dtbs_check error, but not related to this patchset,
> > it is because
> >
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2F
> lore
> > .kernel.org%2Fimx%2F20250718094723.3680482-1-
> peng.fan%40nxp.com%2F&dat
> >
> a=05%7C02%7Cpeng.fan%40nxp.com%7Cdc5a5e6a80884995523d08d
> dde8482f9%7C68
> >
> 6ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C63891138289855
> 9682%7CUnknown%
> >
> 7CTWFpbGZsb3d8eyJFbXB0eU1hcGkiOnRydWUsIlYiOiIwLjAuMDAwMC
> IsIlAiOiJXaW4z
> >
> MiIsIkFOIjoiTWFpbCIsIldUIjoyfQ%3D%3D%7C0%7C%7C%7C&sdata=Uf
> %2Fftx%2Fo1D
> > 9K5ev%2F57Q2ib5k1eCXbw2bJv7CoF2fNNM%3D&reserved=0
> > not applied.
> > - Link to v1:
> >
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2F
> lore
> > .kernel.org%2Fr%2F20250815-imx9-dts-v1-0-
> e609eb4e3105%40nxp.com&data=0
> >
> 5%7C02%7Cpeng.fan%40nxp.com%7Cdc5a5e6a80884995523d08ddde
> 8482f9%7C686ea
> >
> 1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C63891138289859878
> 0%7CUnknown%7CT
> >
> WFpbGZsb3d8eyJFbXB0eU1hcGkiOnRydWUsIlYiOiIwLjAuMDAwMCIsIl
> AiOiJXaW4zMiI
> >
> sIkFOIjoiTWFpbCIsIldUIjoyfQ%3D%3D%7C0%7C%7C%7C&sdata=lKYrW
> kLP9HAcsuBgT
> > NZr24y51QJKZe6Z5HyTvw6d1pI%3D&reserved=0
> >
> > ---
> > Joy Zou (1):
> >       arm64: dts: imx95: Correct the lpuart7 and lpuart8 srcid
> >
> > Luke Wang (1):
> >       arm64: dts: imx95-15x15-evk: Change pinctrl settings for usdhc2
> >
> > Peng Fan (8):
> >       arm64: dts: imx95: Add System Counter node
> >       arm64: dts: imx95: Add LMM/CPU nodes
> >       arm64: dts: imx95: Add more V2X MUs
> >       arm64: dts: imx95: Add OCOTP node
> >       arm64: dts: imx95: Add coresight nodes
> >       arm64: dts: imx95-evk: Update alias
> >       arm64: dts: imx95-19x19-evk: Add pca9632 node
> >       arm64: dts: imx95-19x19-evk: Add pf09 and pf53 thermal zones
> >
> > Richard Zhu (1):
> >       arm64: dts: imx95-19x19-evk: Add Tsettle delay in m2 regulator
> >
> >  arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts |  29 +++-
> > arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts |  94
> ++++++++++++
> >  arch/arm64/boot/dts/freescale/imx95.dtsi          | 165
> +++++++++++++++++++++-
> >  3 files changed, 280 insertions(+), 8 deletions(-)
> > ---
> > base-commit: ff837884a4642382a24d10fd503acf2c3a472f10
> > change-id: 20250813-imx9-dts-664f7ba66ae7
> >
> > Best regards,
> > --
> > Peng Fan <peng.fan@nxp.com>
> >
> >
> >
> 
> 
> My bot found new DTB warnings on the .dts files added or changed in
> this series.
> 
> Some warnings may be from an existing SoC .dtsi. Or perhaps the
> warnings are fixed by another series. Ultimately, it is up to the platform
> maintainer whether these warnings are acceptable or not. No need to
> reply unless the platform maintainer has comments.
> 
> If you already ran DT checks and didn't see these error(s), then make
> sure dt-schema is up to date:
> 
>   pip3 install dtschema --upgrade
> 
> 
> This patch series was applied (using b4) to base:
>  Base: base-commit ff837884a4642382a24d10fd503acf2c3a472f10
> not known, ignoring
>  Base: attempting to guess base-commit...
>  Base: tags/next-20250818 (exact match)
> 
> If this is not the correct base, please add 'base-commit' tag (or use b4
> which does this automatically)
> 
> New warnings running 'make CHECK_DTBS=y for
> arch/arm64/boot/dts/freescale/' for 20250818-imx9-dts-v2-0-
> 8ba787fb5280@nxp.com:
> 
> arch/arm64/boot/dts/freescale/imx95-tqma9596sa-mb-smarc-2.dtb:
> scmi (arm,scmi): Unevaluated properties are not allowed
> ('protocol@80', 'protocol@81', 'protocol@82', 'protocol@84' were
> unexpected)
> 	from schema $id:

This is not introduced by this patchset as written in cover-letter.

The error will disappear after https://lore.kernel.org/imx/20250718094723.3680482-1-peng.fan@nxp.com/   being accepted.

Thanks,
Peng
> 
> 
> 
> 

Re: [PATCH v2 00/11] arm64: dts: imx95: various updates

[Shawn Guo]

On Mon, Aug 18, 2025 at 09:25:30AM +0800, Peng Fan wrote:
> Joy Zou (1):
>       arm64: dts: imx95: Correct the lpuart7 and lpuart8 srcid
> 
> Luke Wang (1):
>       arm64: dts: imx95-15x15-evk: Change pinctrl settings for usdhc2
> 
> Peng Fan (8):
>       arm64: dts: imx95: Add System Counter node
>       arm64: dts: imx95: Add LMM/CPU nodes
>       arm64: dts: imx95: Add more V2X MUs
>       arm64: dts: imx95: Add OCOTP node
>       arm64: dts: imx95: Add coresight nodes
>       arm64: dts: imx95-evk: Update alias
>       arm64: dts: imx95-19x19-evk: Add pca9632 node
>       arm64: dts: imx95-19x19-evk: Add pf09 and pf53 thermal zones
> 
> Richard Zhu (1):
>       arm64: dts: imx95-19x19-evk: Add Tsettle delay in m2 regulator

Applied all, thanks!