From: Frank Li <Frank.li@nxp.com>
To: Richard Zhu <hongxing.zhu@nxp.com>
Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
bhelgaas@google.com, l.stach@pengutronix.de,
lpieralisi@kernel.org, kwilczynski@kernel.org, mani@kernel.org,
s.hauer@pengutronix.de, kernel@pengutronix.de,
festevam@gmail.com, linux-pci@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
imx@lists.linux.dev, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 1/4] dt-bindings: PCI: pci-imx6: Fix build warning after adding extref clock
Date: Mon, 9 Mar 2026 11:18:39 -0400 [thread overview]
Message-ID: <aa7kz1B4PabMho2a@lizhi-Precision-Tower-5810> (raw)
In-Reply-To: <20260309084431.3015463-2-hongxing.zhu@nxp.com>
On Mon, Mar 09, 2026 at 04:44:28PM +0800, Richard Zhu wrote:
dt-bindings: PCI: pci-imx6: Change maxItems of clocks and clock-names to 6
Previous commit 1352f58d7c8d ("dt-bindings: PCI: pci-imx6: Add external
reference clock input") was incomplete.
The constraints for "clocks" and "clock-names" still enforce an incorrect
number of items. Update maxItems for both properties to 6 to match the
actual hardware configuration.
---
After ---, you'd better to said
Sorry to miss testing when work 1352f58d7c8d.
Frank
> Fix dtbs_check build warnings by updating the maxItems property for
> clocks in fsl,imx6q-pcie-common.yaml and completing the clock
> descriptions in fsl,imx6q-pcie.yaml.
>
> The warnings occur because the clock arrays exceed the previously
> defined maximum length:
>
> imx943-evk.dtb: pcie@4c380000 (fsl,imx95-pcie): clock-names: ['pcie', 'pcie_bus', 'pcie_phy', 'pcie_aux', 'ref', 'extref'] is too long
> imx943-evk.dtb: pcie@4c300000 (fsl,imx95-pcie): clocks: [[5, 74], [5, 41], [5, 40], [5, 75], [46, 0], [47]] is too long
>
> Fixes: 1352f58d7c8d ("dt-bindings: PCI: pci-imx6: Add external reference clock input")
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> ---
> .../devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml | 4 ++--
> Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 3 ++-
> 2 files changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml
> index cddbe21f99f2..0488c942092d 100644
> --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml
> +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml
> @@ -17,11 +17,11 @@ description:
> properties:
> clocks:
> minItems: 3
> - maxItems: 5
> + maxItems: 6
>
> clock-names:
> minItems: 3
> - maxItems: 5
> + maxItems: 6
>
> num-lanes:
> const: 1
> diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> index 12a01f7a5744..7fe1e0e9b565 100644
> --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> @@ -40,7 +40,8 @@ properties:
> - description: PCIe PHY clock.
> - description: Additional required clock entry for imx6sx-pcie,
> imx6sx-pcie-ep, imx8mq-pcie, imx8mq-pcie-ep.
> - - description: PCIe reference clock.
> + - description: PCIe internal reference clock.
> + - description: PCIe additional external reference clock
>
> clock-names:
> minItems: 3
> --
> 2.37.1
>
next prev parent reply other threads:[~2026-03-09 15:18 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-09 8:44 [PATCH v3 0/4] Add i.MX943 PCIe supports Richard Zhu
2026-03-09 8:44 ` [PATCH v3 1/4] dt-bindings: PCI: pci-imx6: Fix build warning after adding extref clock Richard Zhu
2026-03-09 15:18 ` Frank Li [this message]
2026-03-10 7:59 ` Krzysztof Kozlowski
2026-03-10 8:30 ` Hongxing Zhu
2026-03-09 8:44 ` [PATCH v3 2/4] arm64: dts: imx94: add pcie0 and pcie0-ep supports Richard Zhu
2026-03-09 19:54 ` Frank Li
2026-03-09 8:44 ` [PATCH v3 3/4] arm64: dts: imx943: add pcie1 and pcie1-ep supports Richard Zhu
2026-03-09 8:44 ` [PATCH v3 4/4] arm64: dts: imx943-evk: Add pcie[0,1] and pcie-ep[0,1] support Richard Zhu
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