* Re: [PATCH v2 3/4] gpio: imx-rpmsg: add imx-rpmsg GPIO driver
2025-09-22 20:04 ` [PATCH v2 3/4] gpio: imx-rpmsg: add imx-rpmsg GPIO driver Shenwei Wang
@ 2025-09-24 17:07 ` kernel test robot
2025-09-29 3:37 ` Peng Fan
` (2 subsequent siblings)
3 siblings, 0 replies; 18+ messages in thread
From: kernel test robot @ 2025-09-24 17:07 UTC (permalink / raw)
To: Shenwei Wang, Bjorn Andersson, Mathieu Poirier, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer,
Linus Walleij, Bartosz Golaszewski
Cc: oe-kbuild-all, Pengutronix Kernel Team, Fabio Estevam, Peng Fan,
linux-remoteproc, devicetree, imx, linux-arm-kernel, linux-kernel,
linux-imx, Shenwei Wang
Hi Shenwei,
kernel test robot noticed the following build warnings:
[auto build test WARNING on remoteproc/rproc-next]
[also build test WARNING on brgl/gpio/for-next shawnguo/for-next linus/master v6.17-rc7 next-20250923]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Shenwei-Wang/dt-bindings-remoteproc-imx_rproc-Add-rpmsg-subnode-support/20250923-040844
base: https://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux.git rproc-next
patch link: https://lore.kernel.org/r/20250922200413.309707-4-shenwei.wang%40nxp.com
patch subject: [PATCH v2 3/4] gpio: imx-rpmsg: add imx-rpmsg GPIO driver
config: arm64-randconfig-r121-20250924 (https://download.01.org/0day-ci/archive/20250925/202509250023.gNpm32hs-lkp@intel.com/config)
compiler: clang version 20.1.8 (https://github.com/llvm/llvm-project 87f0227cb60147a26a1eeb4fb06e3b505e9c7261)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250925/202509250023.gNpm32hs-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202509250023.gNpm32hs-lkp@intel.com/
sparse warnings: (new ones prefixed by >>)
>> drivers/gpio/gpio-imx-rpmsg.c:410:44: sparse: sparse: Using plain integer as NULL pointer
vim +410 drivers/gpio/gpio-imx-rpmsg.c
405
406 static void imx_rpmsg_gpio_remove_action(void *data)
407 {
408 struct imx_rpmsg_gpio_port *port = data;
409
> 410 port->info.port_store[port->idx] = 0;
411 }
412
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH v2 3/4] gpio: imx-rpmsg: add imx-rpmsg GPIO driver
2025-09-22 20:04 ` [PATCH v2 3/4] gpio: imx-rpmsg: add imx-rpmsg GPIO driver Shenwei Wang
2025-09-24 17:07 ` kernel test robot
@ 2025-09-29 3:37 ` Peng Fan
2025-09-29 14:59 ` Shenwei Wang
2025-10-01 6:57 ` Linus Walleij
2025-10-03 7:40 ` Arnaud POULIQUEN
3 siblings, 1 reply; 18+ messages in thread
From: Peng Fan @ 2025-09-29 3:37 UTC (permalink / raw)
To: Shenwei Wang
Cc: Bjorn Andersson, Mathieu Poirier, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer,
Linus Walleij, Bartosz Golaszewski, Pengutronix Kernel Team,
Fabio Estevam, Peng Fan, linux-remoteproc, devicetree, imx,
linux-arm-kernel, linux-kernel, linux-imx
Hi Shenwei,
On Mon, Sep 22, 2025 at 03:04:12PM -0500, Shenwei Wang wrote:
>On i.MX SoCs, the system may include two processors:
> - An MCU running an RTOS
> - An MPU running Linux
>
>These processors communicate via the RPMSG protocol.
>The driver implements the standard GPIO interface, allowing
>the Linux side to control GPIO controllers which reside in
>the remote processor via RPMSG protocol.
>+ */
...
>+
>+#include <linux/err.h>
>+#include <linux/gpio/driver.h>
>+#include <linux/rpmsg/imx_rpmsg.h>
>+#include <linux/init.h>
>+#include <linux/irqdomain.h>
>+#include <linux/of.h>
>+#include <linux/platform_device.h>
>+#include <linux/rpmsg.h>
The included headers should be sorted.
>+
>+#define IMX_RPMSG_GPIO_PER_PORT 32
>+#define RPMSG_TIMEOUT 1000
>+
>+enum gpio_input_trigger_type {
>+ GPIO_RPMSG_TRI_IGNORE,
>+ GPIO_RPMSG_TRI_RISING,
>+ GPIO_RPMSG_TRI_FALLING,
>+ GPIO_RPMSG_TRI_BOTH_EDGE,
>+ GPIO_RPMSG_TRI_LOW_LEVEL,
>+ GPIO_RPMSG_TRI_HIGH_LEVEL,
>+};
>+
>+enum gpio_rpmsg_header_type {
>+ GPIO_RPMSG_SETUP,
>+ GPIO_RPMSG_REPLY,
>+ GPIO_RPMSG_NOTIFY,
>+};
>+
>+enum gpio_rpmsg_header_cmd {
>+ GPIO_RPMSG_INPUT_INIT,
>+ GPIO_RPMSG_OUTPUT_INIT,
>+ GPIO_RPMSG_INPUT_GET,
>+};
>+
>+struct gpio_rpmsg_data {
>+ struct imx_rpmsg_head header;
>+ u8 pin_idx;
>+ u8 port_idx;
>+ union {
>+ u8 event;
>+ u8 retcode;
>+ u8 value;
>+ } out;
>+ union {
>+ u8 wakeup;
>+ u8 value;
>+ } in;
>+} __packed __aligned(8);
>+
>+struct imx_rpmsg_gpio_pin {
>+ u8 irq_shutdown;
>+ u8 irq_unmask;
>+ u8 irq_mask;
>+ u32 irq_wake_enable;
>+ u32 irq_type;
>+ struct gpio_rpmsg_data msg;
>+};
>+
>+struct imx_gpio_rpmsg_info {
>+ struct rpmsg_device *rpdev;
>+ struct gpio_rpmsg_data *notify_msg;
>+ struct gpio_rpmsg_data *reply_msg;
>+ struct completion cmd_complete;
>+ struct mutex lock;
>+ void **port_store;
>+};
>+
>+struct imx_rpmsg_gpio_port {
>+ struct gpio_chip gc;
>+ struct imx_rpmsg_gpio_pin gpio_pins[IMX_RPMSG_GPIO_PER_PORT];
>+ struct imx_gpio_rpmsg_info info;
>+ int idx;
>+};
>+
>+static int gpio_send_message(struct imx_rpmsg_gpio_port *port,
>+ struct gpio_rpmsg_data *msg,
>+ bool sync)
>+{
>+ struct imx_gpio_rpmsg_info *info = &port->info;
>+ int err;
>+
>+ if (!info->rpdev) {
>+ dev_dbg(&info->rpdev->dev,
>+ "rpmsg channel not ready, m4 image ready?\n");
"m4 image" -> "remote core"
>+ return -EINVAL;
>+ }
>+
>+ reinit_completion(&info->cmd_complete);
>+ err = rpmsg_send(info->rpdev->ept, (void *)msg,
>+ sizeof(struct gpio_rpmsg_data));
>+ if (err) {
>+ dev_err(&info->rpdev->dev, "rpmsg_send failed: %d\n", err);
>+ return err;
>+ }
>+
>+ if (sync) {
>+ err = wait_for_completion_timeout(&info->cmd_complete,
>+ msecs_to_jiffies(RPMSG_TIMEOUT));
>+ if (!err) {
>+ dev_err(&info->rpdev->dev, "rpmsg_send timeout!\n");
>+ return -ETIMEDOUT;
>+ }
>+
>+ if (info->reply_msg->out.retcode != 0) {
>+ dev_err(&info->rpdev->dev, "rpmsg not ack %d!\n",
>+ info->reply_msg->out.retcode);
>+ return -EINVAL;
>+ }
>+
>+ /* copy the reply message */
>+ memcpy(&port->gpio_pins[info->reply_msg->pin_idx].msg,
>+ info->reply_msg, sizeof(*info->reply_msg));
>+ }
>+
>+ return 0;
>+}
>+
>+static struct gpio_rpmsg_data *gpio_get_pin_msg(struct imx_rpmsg_gpio_port *port,
>+ unsigned int offset)
>+{
>+ struct gpio_rpmsg_data *msg = &port->gpio_pins[offset].msg;
>+
>+ memset(msg, 0, sizeof(struct gpio_rpmsg_data));
>+
>+ return msg;
>+};
>+
>+static int imx_rpmsg_gpio_get(struct gpio_chip *gc, unsigned int gpio)
>+{
>+ struct imx_rpmsg_gpio_port *port = gpiochip_get_data(gc);
>+ struct gpio_rpmsg_data *msg = NULL;
>+ int ret;
>+
>+ guard(mutex)(&port->info.lock);
>+
>+ msg = gpio_get_pin_msg(port, gpio);
>+ msg->header.cate = IMX_RPMSG_GPIO;
>+ msg->header.major = IMX_RMPSG_MAJOR;
>+ msg->header.minor = IMX_RMPSG_MINOR;
>+ msg->header.type = GPIO_RPMSG_SETUP;
>+ msg->header.cmd = GPIO_RPMSG_INPUT_GET;
>+ msg->pin_idx = gpio;
>+ msg->port_idx = port->idx;
>+
>+ ret = gpio_send_message(port, msg, true);
>+ if (!ret)
>+ ret = !!port->gpio_pins[gpio].msg.in.value;
>+
>+ return ret;
>+}
>+
>+static int imx_rpmsg_gpio_direction_input(struct gpio_chip *gc,
>+ unsigned int gpio)
>+{
>+ struct imx_rpmsg_gpio_port *port = gpiochip_get_data(gc);
>+ struct gpio_rpmsg_data *msg = NULL;
>+
>+ guard(mutex)(&port->info.lock);
>+
>+ msg = gpio_get_pin_msg(port, gpio);
>+ msg->header.cate = IMX_RPMSG_GPIO;
>+ msg->header.major = IMX_RMPSG_MAJOR;
>+ msg->header.minor = IMX_RMPSG_MINOR;
>+ msg->header.type = GPIO_RPMSG_SETUP;
>+ msg->header.cmd = GPIO_RPMSG_INPUT_INIT;
>+ msg->pin_idx = gpio;
>+ msg->port_idx = port->idx;
>+
>+ msg->out.event = GPIO_RPMSG_TRI_IGNORE;
>+ msg->in.wakeup = 0;
>+
>+ return gpio_send_message(port, msg, true);
>+}
>+
>+static inline void imx_rpmsg_gpio_direction_output_init(struct gpio_chip *gc,
>+ unsigned int gpio, int val, struct gpio_rpmsg_data *msg)
>+{
>+ struct imx_rpmsg_gpio_port *port = gpiochip_get_data(gc);
>+
>+ msg->header.cate = IMX_RPMSG_GPIO;
>+ msg->header.major = IMX_RMPSG_MAJOR;
>+ msg->header.minor = IMX_RMPSG_MINOR;
>+ msg->header.type = GPIO_RPMSG_SETUP;
>+ msg->header.cmd = GPIO_RPMSG_OUTPUT_INIT;
>+ msg->pin_idx = gpio;
>+ msg->port_idx = port->idx;
>+ msg->out.value = val;
>+}
>+
>+static int imx_rpmsg_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
>+{
>+ struct imx_rpmsg_gpio_port *port = gpiochip_get_data(gc);
>+ struct gpio_rpmsg_data *msg = NULL;
>+
>+ guard(mutex)(&port->info.lock);
>+
>+ msg = gpio_get_pin_msg(port, gpio);
>+ imx_rpmsg_gpio_direction_output_init(gc, gpio, val, msg);
>+
>+ return gpio_send_message(port, msg, true);
>+}
>+
>+static int imx_rpmsg_gpio_direction_output(struct gpio_chip *gc,
>+ unsigned int gpio, int val)
>+{
>+ struct imx_rpmsg_gpio_port *port = gpiochip_get_data(gc);
>+ struct gpio_rpmsg_data *msg = NULL;
>+
>+ guard(mutex)(&port->info.lock);
>+
>+ msg = gpio_get_pin_msg(port, gpio);
>+ imx_rpmsg_gpio_direction_output_init(gc, gpio, val, msg);
>+
>+ return gpio_send_message(port, msg, true);
>+}
>+
>+static int imx_rpmsg_irq_set_type(struct irq_data *d, u32 type)
>+{
>+ struct imx_rpmsg_gpio_port *port = irq_data_get_irq_chip_data(d);
>+ u32 gpio_idx = d->hwirq;
>+ int edge = 0;
>+ int ret = 0;
>+
>+ switch (type) {
>+ case IRQ_TYPE_EDGE_RISING:
>+ edge = GPIO_RPMSG_TRI_RISING;
>+ break;
>+ case IRQ_TYPE_EDGE_FALLING:
>+ edge = GPIO_RPMSG_TRI_FALLING;
>+ break;
>+ case IRQ_TYPE_EDGE_BOTH:
>+ edge = GPIO_RPMSG_TRI_BOTH_EDGE;
>+ break;
>+ case IRQ_TYPE_LEVEL_LOW:
>+ edge = GPIO_RPMSG_TRI_LOW_LEVEL;
>+ break;
>+ case IRQ_TYPE_LEVEL_HIGH:
>+ edge = GPIO_RPMSG_TRI_HIGH_LEVEL;
>+ break;
>+ default:
>+ ret = -EINVAL;
>+ break;
>+ }
>+
>+ port->gpio_pins[gpio_idx].irq_type = edge;
>+
>+ return ret;
>+}
>+
>+static int imx_rpmsg_irq_set_wake(struct irq_data *d, u32 enable)
>+{
>+ struct imx_rpmsg_gpio_port *port = irq_data_get_irq_chip_data(d);
>+ u32 gpio_idx = d->hwirq;
>+
>+ port->gpio_pins[gpio_idx].irq_wake_enable = enable;
>+
>+ return 0;
>+}
>+
>+/*
>+ * This function will be called at:
>+ * - one interrupt setup.
>+ * - the end of one interrupt happened
>+ * The gpio over rpmsg driver will not write the real register, so save
>+ * all infos before this function and then send all infos to M core in this
>+ * step.
>+ */
>+static void imx_rpmsg_unmask_irq(struct irq_data *d)
>+{
>+ struct imx_rpmsg_gpio_port *port = irq_data_get_irq_chip_data(d);
>+ u32 gpio_idx = d->hwirq;
>+
>+ port->gpio_pins[gpio_idx].irq_unmask = 1;
>+}
>+
>+static void imx_rpmsg_mask_irq(struct irq_data *d)
>+{
>+ struct imx_rpmsg_gpio_port *port = irq_data_get_irq_chip_data(d);
>+ u32 gpio_idx = d->hwirq;
>+ /*
>+ * No need to implement the callback at A core side.
>+ * M core will mask interrupt after a interrupt occurred, and then
>+ * sends a notify to A core.
>+ * After A core dealt with the notify, A core will send a rpmsg to
>+ * M core to unmask this interrupt again.
>+ */
>+ port->gpio_pins[gpio_idx].irq_mask = 1;
>+}
>+
>+static void imx_rpmsg_irq_shutdown(struct irq_data *d)
>+{
>+ struct imx_rpmsg_gpio_port *port = irq_data_get_irq_chip_data(d);
>+ u32 gpio_idx = d->hwirq;
>+
>+ port->gpio_pins[gpio_idx].irq_shutdown = 1;
>+}
>+
>+static void imx_rpmsg_irq_bus_lock(struct irq_data *d)
>+{
>+ struct imx_rpmsg_gpio_port *port = irq_data_get_irq_chip_data(d);
>+
>+ mutex_lock(&port->info.lock);
>+}
>+
>+static void imx_rpmsg_irq_bus_sync_unlock(struct irq_data *d)
>+{
>+ struct imx_rpmsg_gpio_port *port = irq_data_get_irq_chip_data(d);
>+ struct gpio_rpmsg_data *msg = NULL;
>+ u32 gpio_idx = d->hwirq;
>+
>+ if (port == NULL) {
>+ mutex_unlock(&port->info.lock);
>+ return;
>+ }
>+
>+ /*
>+ * For mask irq, do nothing here.
>+ * M core will mask interrupt after a interrupt occurred, and then
>+ * sends a notify to A core.
>+ * After A core dealt with the notify, A core will send a rpmsg to
>+ * M core to unmask this interrupt again.
>+ */
>+
>+ if (port->gpio_pins[gpio_idx].irq_mask && !port->gpio_pins[gpio_idx].irq_unmask) {
>+ port->gpio_pins[gpio_idx].irq_mask = 0;
>+ mutex_unlock(&port->info.lock);
>+ return;
>+ }
>+
>+ msg = gpio_get_pin_msg(port, gpio_idx);
>+ msg->header.cate = IMX_RPMSG_GPIO;
>+ msg->header.major = IMX_RMPSG_MAJOR;
>+ msg->header.minor = IMX_RMPSG_MINOR;
>+ msg->header.type = GPIO_RPMSG_SETUP;
>+ msg->header.cmd = GPIO_RPMSG_INPUT_INIT;
>+ msg->pin_idx = gpio_idx;
>+ msg->port_idx = port->idx;
>+
>+ if (port->gpio_pins[gpio_idx].irq_shutdown) {
>+ msg->out.event = GPIO_RPMSG_TRI_IGNORE;
>+ msg->in.wakeup = 0;
>+ port->gpio_pins[gpio_idx].irq_shutdown = 0;
>+ } else {
>+ /* if not set irq type, then use low level as trigger type */
>+ msg->out.event = port->gpio_pins[gpio_idx].irq_type;
>+ if (!msg->out.event)
>+ msg->out.event = GPIO_RPMSG_TRI_LOW_LEVEL;
>+ if (port->gpio_pins[gpio_idx].irq_unmask) {
>+ msg->in.wakeup = 0;
>+ port->gpio_pins[gpio_idx].irq_unmask = 0;
>+ } else /* irq set wake */
>+ msg->in.wakeup = port->gpio_pins[gpio_idx].irq_wake_enable;
>+ }
>+
>+ gpio_send_message(port, msg, false);
>+ mutex_unlock(&port->info.lock);
>+}
>+
>+static const struct irq_chip imx_rpmsg_irq_chip = {
>+ .irq_mask = imx_rpmsg_mask_irq,
>+ .irq_unmask = imx_rpmsg_unmask_irq,
>+ .irq_set_wake = imx_rpmsg_irq_set_wake,
>+ .irq_set_type = imx_rpmsg_irq_set_type,
>+ .irq_shutdown = imx_rpmsg_irq_shutdown,
>+ .irq_bus_lock = imx_rpmsg_irq_bus_lock,
>+ .irq_bus_sync_unlock = imx_rpmsg_irq_bus_sync_unlock,
>+ .flags = IRQCHIP_IMMUTABLE,
>+};
>+
>+static int imx_rpmsg_gpio_callback(struct rpmsg_device *rpdev,
>+ void *data, int len, void *priv, u32 src)
>+{
>+ struct gpio_rpmsg_data *msg = (struct gpio_rpmsg_data *)data;
>+ struct imx_rpmsg_gpio_port *port = NULL;
>+ struct imx_rpmsg_driver_data *drvdata;
>+ unsigned long flags;
>+
>+ drvdata = dev_get_drvdata(&rpdev->dev);
>+ if (msg)
>+ port = drvdata->channel_devices[msg->port_idx];
>+
>+ if (!port)
>+ return -ENODEV;
>+
>+ if (msg->header.type == GPIO_RPMSG_REPLY) {
>+ port->info.reply_msg = msg;
>+ complete(&port->info.cmd_complete);
>+ } else if (msg->header.type == GPIO_RPMSG_NOTIFY) {
>+ port->info.notify_msg = msg;
>+ local_irq_save(flags);
Would you explain a bit on why need to disable IRQ on current core.
>+ generic_handle_domain_irq(port->gc.irq.domain, msg->pin_idx);
>+ local_irq_restore(flags);
>+ } else
>+ dev_err(&rpdev->dev, "wrong command type!\n");
>+
>+ return 0;
>+}
>+
>+static void imx_rpmsg_gpio_remove_action(void *data)
>+{
>+ struct imx_rpmsg_gpio_port *port = data;
>+
>+ port->info.port_store[port->idx] = 0;
>+}
>+
>+static int imx_rpmsg_gpio_probe(struct platform_device *pdev)
>+{
>+ struct imx_rpmsg_driver_data *pltdata = pdev->dev.platform_data;
>+ struct device_node *np = pdev->dev.of_node;
>+ struct imx_rpmsg_gpio_port *port;
>+ struct gpio_irq_chip *girq;
>+ struct gpio_chip *gc;
>+ int ret;
>+
>+ if (!pltdata)
>+ return -EPROBE_DEFER;
>+
>+ port = devm_kzalloc(&pdev->dev, sizeof(*port), GFP_KERNEL);
>+ if (!port)
>+ return -ENOMEM;
>+
>+ ret = of_property_read_u32(np, "reg", &port->idx);
"device_property_read_u32" should be better.
>+ if (ret)
>+ return ret;
>+
>+ if (port->idx > MAX_DEV_PER_CHANNEL)
>+ return -EINVAL;
>+
>+ mutex_init(&port->info.lock);
>+ init_completion(&port->info.cmd_complete);
>+ port->info.rpdev = pltdata->rpdev;
>+ port->info.port_store = pltdata->channel_devices;
>+ port->info.port_store[port->idx] = port;
>+ if (!pltdata->rx_callback)
>+ pltdata->rx_callback = imx_rpmsg_gpio_callback;
>+
>+ gc = &port->gc;
>+ gc->owner = THIS_MODULE;
>+ gc->parent = &pltdata->rpdev->dev;
>+ gc->label = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s-gpio%d",
>+ pltdata->rproc_name, port->idx);
>+ gc->ngpio = IMX_RPMSG_GPIO_PER_PORT;
>+ gc->base = -1;
>+
>+ gc->direction_input = imx_rpmsg_gpio_direction_input;
>+ gc->direction_output = imx_rpmsg_gpio_direction_output;
>+ gc->get = imx_rpmsg_gpio_get;
>+ gc->set = imx_rpmsg_gpio_set;
>+
>+ platform_set_drvdata(pdev, port);
>+ girq = &gc->irq;
>+ gpio_irq_chip_set_chip(girq, &imx_rpmsg_irq_chip);
>+ girq->parent_handler = NULL;
>+ girq->num_parents = 0;
>+ girq->parents = NULL;
>+ girq->chip->name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s-gpio%d",
>+ pltdata->rproc_name, port->idx);
Align pltdata->rproc_name with the upper line '('.
>+
>+ devm_add_action_or_reset(&pdev->dev, imx_rpmsg_gpio_remove_action, port);
return value should be checked.
>+
>+ return devm_gpiochip_add_data(&pdev->dev, gc, port);
>+}
>+
Thanks,
Peng
^ permalink raw reply [flat|nested] 18+ messages in thread* RE: [PATCH v2 3/4] gpio: imx-rpmsg: add imx-rpmsg GPIO driver
2025-09-29 3:37 ` Peng Fan
@ 2025-09-29 14:59 ` Shenwei Wang
0 siblings, 0 replies; 18+ messages in thread
From: Shenwei Wang @ 2025-09-29 14:59 UTC (permalink / raw)
To: Peng Fan (OSS)
Cc: Bjorn Andersson, Mathieu Poirier, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer,
Linus Walleij, Bartosz Golaszewski, Pengutronix Kernel Team,
Fabio Estevam, Peng Fan, linux-remoteproc@vger.kernel.org,
devicetree@vger.kernel.org, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, dl-linux-imx
> -----Original Message-----
> From: Peng Fan (OSS) <peng.fan@oss.nxp.com>
> Sent: Sunday, September 28, 2025 10:37 PM
> To: Shenwei Wang <shenwei.wang@nxp.com>
> Cc: Bjorn Andersson <andersson@kernel.org>; Mathieu Poirier
> <mathieu.poirier@linaro.org>; Rob Herring <robh@kernel.org>; Krzysztof
> Kozlowski <krzk+dt@kernel.org>; Conor Dooley <conor+dt@kernel.org>; Shawn
> Guo <shawnguo@kernel.org>; Sascha Hauer <s.hauer@pengutronix.de>; Linus
> Walleij <linus.walleij@linaro.org>; Bartosz Golaszewski <brgl@bgdev.pl>;
> Pengutronix Kernel Team <kernel@pengutronix.de>; Fabio Estevam
> <festevam@gmail.com>; Peng Fan <peng.fan@nxp.com>; linux-
> remoteproc@vger.kernel.org; devicetree@vger.kernel.org; imx@lists.linux.dev;
> linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org; dl-linux-imx
> >+ if (!port)
> >+ return -ENODEV;
> >+
> >+ if (msg->header.type == GPIO_RPMSG_REPLY) {
> >+ port->info.reply_msg = msg;
> >+ complete(&port->info.cmd_complete);
> >+ } else if (msg->header.type == GPIO_RPMSG_NOTIFY) {
> >+ port->info.notify_msg = msg;
> >+ local_irq_save(flags);
>
> Would you explain a bit on why need to disable IRQ on current core.
>
The generic_handle_domain_irq is required to be called in an IRQ context. Seems it can
be replaced with the generic_handle_domain_irq_safe here.
Thanks,
Shenwei
> >+ generic_handle_domain_irq(port->gc.irq.domain, msg->pin_idx);
> >+ local_irq_restore(flags);
> >+ } else
> >+ dev_err(&rpdev->dev, "wrong command type!\n");
> >+
> >+ return 0;
> >+}
> >+
> >+static void imx_rpmsg_gpio_remove_action(void *data) {
> >+ struct imx_rpmsg_gpio_port *port = data;
> >+
> >+ port->info.port_store[port->idx] = 0; }
> >+
> >+static int imx_rpmsg_gpio_probe(struct platform_device *pdev) {
> >+ struct imx_rpmsg_driver_data *pltdata = pdev->dev.platform_data;
> >+ struct device_node *np = pdev->dev.of_node;
> >+ struct imx_rpmsg_gpio_port *port;
> >+ struct gpio_irq_chip *girq;
> >+ struct gpio_chip *gc;
> >+ int ret;
> >+
> >+ if (!pltdata)
> >+ return -EPROBE_DEFER;
> >+
> >+ port = devm_kzalloc(&pdev->dev, sizeof(*port), GFP_KERNEL);
> >+ if (!port)
> >+ return -ENOMEM;
> >+
> >+ ret = of_property_read_u32(np, "reg", &port->idx);
>
> "device_property_read_u32" should be better.
>
> >+ if (ret)
> >+ return ret;
> >+
> >+ if (port->idx > MAX_DEV_PER_CHANNEL)
> >+ return -EINVAL;
> >+
> >+ mutex_init(&port->info.lock);
> >+ init_completion(&port->info.cmd_complete);
> >+ port->info.rpdev = pltdata->rpdev;
> >+ port->info.port_store = pltdata->channel_devices;
> >+ port->info.port_store[port->idx] = port;
> >+ if (!pltdata->rx_callback)
> >+ pltdata->rx_callback = imx_rpmsg_gpio_callback;
> >+
> >+ gc = &port->gc;
> >+ gc->owner = THIS_MODULE;
> >+ gc->parent = &pltdata->rpdev->dev;
> >+ gc->label = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s-gpio%d",
> >+ pltdata->rproc_name, port->idx);
> >+ gc->ngpio = IMX_RPMSG_GPIO_PER_PORT;
> >+ gc->base = -1;
> >+
> >+ gc->direction_input = imx_rpmsg_gpio_direction_input;
> >+ gc->direction_output = imx_rpmsg_gpio_direction_output;
> >+ gc->get = imx_rpmsg_gpio_get;
> >+ gc->set = imx_rpmsg_gpio_set;
> >+
> >+ platform_set_drvdata(pdev, port);
> >+ girq = &gc->irq;
> >+ gpio_irq_chip_set_chip(girq, &imx_rpmsg_irq_chip);
> >+ girq->parent_handler = NULL;
> >+ girq->num_parents = 0;
> >+ girq->parents = NULL;
> >+ girq->chip->name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s-
> gpio%d",
> >+ pltdata->rproc_name, port->idx);
>
> Align pltdata->rproc_name with the upper line '('.
>
> >+
> >+ devm_add_action_or_reset(&pdev->dev,
> imx_rpmsg_gpio_remove_action,
> >+port);
>
> return value should be checked.
>
> >+
> >+ return devm_gpiochip_add_data(&pdev->dev, gc, port); }
> >+
>
> Thanks,
> Peng
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v2 3/4] gpio: imx-rpmsg: add imx-rpmsg GPIO driver
2025-09-22 20:04 ` [PATCH v2 3/4] gpio: imx-rpmsg: add imx-rpmsg GPIO driver Shenwei Wang
2025-09-24 17:07 ` kernel test robot
2025-09-29 3:37 ` Peng Fan
@ 2025-10-01 6:57 ` Linus Walleij
2025-10-02 7:28 ` Arnaud POULIQUEN
2025-10-03 7:40 ` Arnaud POULIQUEN
3 siblings, 1 reply; 18+ messages in thread
From: Linus Walleij @ 2025-10-01 6:57 UTC (permalink / raw)
To: Shenwei Wang
Cc: Bjorn Andersson, Mathieu Poirier, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer,
Bartosz Golaszewski, Pengutronix Kernel Team, Fabio Estevam,
Peng Fan, linux-remoteproc, devicetree, imx, linux-arm-kernel,
linux-kernel, linux-imx
Hi Shenwei,
thanks for your patch!
This patch was not sent to the linux-gpio@vger.kernel.org
mailing list, please include that or we can't merge the driver.
I think the OpenAMP project should show interest in this
patch series so I created an issue in their github:
https://github.com/OpenAMP/website/issues/122
After fixing the issues pointed out by Peng the driver
looks good to me.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v2 3/4] gpio: imx-rpmsg: add imx-rpmsg GPIO driver
2025-10-01 6:57 ` Linus Walleij
@ 2025-10-02 7:28 ` Arnaud POULIQUEN
0 siblings, 0 replies; 18+ messages in thread
From: Arnaud POULIQUEN @ 2025-10-02 7:28 UTC (permalink / raw)
To: Linus Walleij, Shenwei Wang
Cc: Bjorn Andersson, Mathieu Poirier, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer,
Bartosz Golaszewski, Pengutronix Kernel Team, Fabio Estevam,
Peng Fan, linux-remoteproc, devicetree, imx, linux-arm-kernel,
linux-kernel, linux-imx, openamp-rp
Hello Linus
On 10/1/25 08:57, Linus Walleij wrote:
> Hi Shenwei,
>
> thanks for your patch!
>
> This patch was not sent to the linux-gpio@vger.kernel.org
> mailing list, please include that or we can't merge the driver.
>
> I think the OpenAMP project should show interest in this
> patch series so I created an issue in their github:
> https://github.com/OpenAMP/website/issues/122
Thanks for pointing it out , i will do a review of this new version
Regards,
Arnaud
>
> After fixing the issues pointed out by Peng the driver
> looks good to me.
>
> Yours,
> Linus Walleij
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v2 3/4] gpio: imx-rpmsg: add imx-rpmsg GPIO driver
2025-09-22 20:04 ` [PATCH v2 3/4] gpio: imx-rpmsg: add imx-rpmsg GPIO driver Shenwei Wang
` (2 preceding siblings ...)
2025-10-01 6:57 ` Linus Walleij
@ 2025-10-03 7:40 ` Arnaud POULIQUEN
2025-10-03 18:41 ` Shenwei Wang
3 siblings, 1 reply; 18+ messages in thread
From: Arnaud POULIQUEN @ 2025-10-03 7:40 UTC (permalink / raw)
To: Shenwei Wang, Bjorn Andersson, Mathieu Poirier, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer,
Linus Walleij, Bartosz Golaszewski
Cc: Pengutronix Kernel Team, Fabio Estevam, Peng Fan,
linux-remoteproc, devicetree, imx, linux-arm-kernel, linux-kernel,
linux-imx, openamp-rp
Hello Shenwei,
On 9/22/25 22:04, Shenwei Wang wrote:
> On i.MX SoCs, the system may include two processors:
> - An MCU running an RTOS
> - An MPU running Linux
>
> These processors communicate via the RPMSG protocol.
> The driver implements the standard GPIO interface, allowing
> the Linux side to control GPIO controllers which reside in
> the remote processor via RPMSG protocol.
What about my request in previous version to make this driver generic?
In ST we have similar driver in downstream, we would be interested in
reusing it if generic. Indeed we need some rpmsg mechanism for
gpio-interrupt. Today we have a downstream rpmsg driver [1][2] that could
migrate on a generic rpmsg-gpio driver.
[1]Documentation/devicetree/bindings/interrupt-controller/rpmsg,intc.yaml
[2]https://github.com/STMicroelectronics/linux/blob/v6.6-stm32mp/drivers/irqchip/irq-rpmsg.c
My comment below is based on the assumption that it would become generic.
> Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com>
> ---
> drivers/gpio/Kconfig | 17 ++
> drivers/gpio/Makefile | 1 +
> drivers/gpio/gpio-imx-rpmsg.c | 488 ++++++++++++++++++++++++++++++++++
> 3 files changed, 506 insertions(+)
> create mode 100644 drivers/gpio/gpio-imx-rpmsg.c
>
> diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
> index a437fe652dbc..97eda94b0ba1 100644
> --- a/drivers/gpio/Kconfig
> +++ b/drivers/gpio/Kconfig
> @@ -1847,6 +1847,23 @@ config GPIO_SODAVILLE
>
> endmenu
>
> +menu "RPMSG GPIO drivers"
> + depends on RPMSG
> +
> +config GPIO_IMX_RPMSG
> + tristate "NXP i.MX SoC RPMSG GPIO support"
> + depends on IMX_REMOTEPROC
> + select GPIOLIB_IRQCHIP
> + default IMX_REMOTEPROC
> + help
> + Say yes here to support the RPMSG GPIO functions on i.MX SoC based
> + platform. Currently supported devices: i.MX7ULP, i.MX8ULP, i.MX8x,
> + and i.MX9x.
> +
> + If unsure, say N.
> +
> +endmenu
> +
> menu "SPI GPIO expanders"
> depends on SPI_MASTER
>
> diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
> index 379f55e9ed1e..e01465c03431 100644
> --- a/drivers/gpio/Makefile
> +++ b/drivers/gpio/Makefile
> @@ -83,6 +83,7 @@ obj-$(CONFIG_GPIO_I8255) += gpio-i8255.o
> obj-$(CONFIG_GPIO_ICH) += gpio-ich.o
> obj-$(CONFIG_GPIO_IDIO_16) += gpio-idio-16.o
> obj-$(CONFIG_GPIO_IDT3243X) += gpio-idt3243x.o
> +obj-$(CONFIG_GPIO_IMX_RPMSG) += gpio-imx-rpmsg.o
> obj-$(CONFIG_GPIO_IMX_SCU) += gpio-imx-scu.o
> obj-$(CONFIG_GPIO_IT87) += gpio-it87.o
> obj-$(CONFIG_GPIO_IXP4XX) += gpio-ixp4xx.o
> diff --git a/drivers/gpio/gpio-imx-rpmsg.c b/drivers/gpio/gpio-imx-rpmsg.c
> new file mode 100644
> index 000000000000..46b1b6b798c8
> --- /dev/null
> +++ b/drivers/gpio/gpio-imx-rpmsg.c
> @@ -0,0 +1,488 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright 2025 NXP
> + *
> + * The driver exports a standard gpiochip interface to control
> + * the GPIO controllers via RPMSG on a remote processor.
> + */
> +
> +#include <linux/err.h>
> +#include <linux/gpio/driver.h>
> +#include <linux/rpmsg/imx_rpmsg.h>
> +#include <linux/init.h>
> +#include <linux/irqdomain.h>
> +#include <linux/of.h>
> +#include <linux/platform_device.h>
> +#include <linux/rpmsg.h>
> +
> +#define IMX_RPMSG_GPIO_PER_PORT 32
> +#define RPMSG_TIMEOUT 1000
> +
> +enum gpio_input_trigger_type {
> + GPIO_RPMSG_TRI_IGNORE,
> + GPIO_RPMSG_TRI_RISING,
> + GPIO_RPMSG_TRI_FALLING,
> + GPIO_RPMSG_TRI_BOTH_EDGE,
> + GPIO_RPMSG_TRI_LOW_LEVEL,
> + GPIO_RPMSG_TRI_HIGH_LEVEL,
> +};
What about taking inspiration from the|IRQ_TYPE|bitfield defined in|irq.h|?
For instance:
GPIO_RPMSG_TRI_BOTH_EDGE = GPIO_RPMSG_TRI_FALLING | GPIO_RPMSG_TRI_RISING,
> +
> +enum gpio_rpmsg_header_type {
> + GPIO_RPMSG_SETUP,
> + GPIO_RPMSG_REPLY,
> + GPIO_RPMSG_NOTIFY,
> +};
> +
> +enum gpio_rpmsg_header_cmd {
> + GPIO_RPMSG_INPUT_INIT,
> + GPIO_RPMSG_OUTPUT_INIT,
> + GPIO_RPMSG_INPUT_GET,
> +};
> +
> +struct gpio_rpmsg_data {
> + struct imx_rpmsg_head header;
> + u8 pin_idx;
> + u8 port_idx;
> + union {
> + u8 event;
> + u8 retcode;
> + u8 value;
> + } out;
> + union {
> + u8 wakeup;
> + u8 value;
nitpicking put "value" field out of union as common
> + } in;
> +} __packed __aligned(8);
Any reason to pack it an align it?
This structure will be copied in the RPMSg payload, right?
I also wonder if that definition should not be in a header file
with double licensing that the DT. Indeed this need to be
common with the remote side implementation that can
be non GPL implementation.
> +
> +struct imx_rpmsg_gpio_pin {
> + u8 irq_shutdown;
> + u8 irq_unmask;
> + u8 irq_mask;
> + u32 irq_wake_enable;
> + u32 irq_type;
> + struct gpio_rpmsg_data msg;
> +};
> +
> +struct imx_gpio_rpmsg_info {
> + struct rpmsg_device *rpdev;
> + struct gpio_rpmsg_data *notify_msg;
> + struct gpio_rpmsg_data *reply_msg;
> + struct completion cmd_complete;
> + struct mutex lock;
> + void **port_store;
> +};
> +
> +struct imx_rpmsg_gpio_port {
> + struct gpio_chip gc;
> + struct imx_rpmsg_gpio_pin gpio_pins[IMX_RPMSG_GPIO_PER_PORT];
> + struct imx_gpio_rpmsg_info info;
> + int idx;
> +};
> +
> +static int gpio_send_message(struct imx_rpmsg_gpio_port *port,
> + struct gpio_rpmsg_data *msg,
> + bool sync)
> +{
> + struct imx_gpio_rpmsg_info *info = &port->info;
> + int err;
> +
> + if (!info->rpdev) {
> + dev_dbg(&info->rpdev->dev,
> + "rpmsg channel not ready, m4 image ready?\n");
> + return -EINVAL;
> + }
> +
> + reinit_completion(&info->cmd_complete);
> + err = rpmsg_send(info->rpdev->ept, (void *)msg,
> + sizeof(struct gpio_rpmsg_data));
> + if (err) {
> + dev_err(&info->rpdev->dev, "rpmsg_send failed: %d\n", err);
> + return err;
> + }
> +
> + if (sync) {
> + err = wait_for_completion_timeout(&info->cmd_complete,
> + msecs_to_jiffies(RPMSG_TIMEOUT));
> + if (!err) {
> + dev_err(&info->rpdev->dev, "rpmsg_send timeout!\n");
> + return -ETIMEDOUT;
> + }
> +
> + if (info->reply_msg->out.retcode != 0) {
> + dev_err(&info->rpdev->dev, "rpmsg not ack %d!\n",
> + info->reply_msg->out.retcode);
> + return -EINVAL;
> + }
> +
> + /* copy the reply message */
> + memcpy(&port->gpio_pins[info->reply_msg->pin_idx].msg,
> + info->reply_msg, sizeof(*info->reply_msg));
> + }
> +
> + return 0;
> +}
> +
> +static struct gpio_rpmsg_data *gpio_get_pin_msg(struct imx_rpmsg_gpio_port *port,
> + unsigned int offset)
> +{
> + struct gpio_rpmsg_data *msg = &port->gpio_pins[offset].msg;
> +
> + memset(msg, 0, sizeof(struct gpio_rpmsg_data));
> +
> + return msg;
> +};
> +
> +static int imx_rpmsg_gpio_get(struct gpio_chip *gc, unsigned int gpio)
> +{
> + struct imx_rpmsg_gpio_port *port = gpiochip_get_data(gc);
> + struct gpio_rpmsg_data *msg = NULL;
> + int ret;
> +
> + guard(mutex)(&port->info.lock);
> +
> + msg = gpio_get_pin_msg(port, gpio);
> + msg->header.cate = IMX_RPMSG_GPIO;
> + msg->header.major = IMX_RMPSG_MAJOR;
> + msg->header.minor = IMX_RMPSG_MINOR;
> + msg->header.type = GPIO_RPMSG_SETUP;
> + msg->header.cmd = GPIO_RPMSG_INPUT_GET;
> + msg->pin_idx = gpio;
> + msg->port_idx = port->idx;
> +
> + ret = gpio_send_message(port, msg, true);
> + if (!ret)
> + ret = !!port->gpio_pins[gpio].msg.in.value;
Does this code is save? !! return a boolean right?
why not force to 1 if greater that 1?
> +
> + return ret;
> +}
> +
> +static int imx_rpmsg_gpio_direction_input(struct gpio_chip *gc,
> + unsigned int gpio)
> +{
> + struct imx_rpmsg_gpio_port *port = gpiochip_get_data(gc);
> + struct gpio_rpmsg_data *msg = NULL;
> +
> + guard(mutex)(&port->info.lock);
> +
> + msg = gpio_get_pin_msg(port, gpio);
> + msg->header.cate = IMX_RPMSG_GPIO;
Do you use a single rpmsg channel for several feature?
Any reason to not use one rpmsg channel per feature category?
> + msg->header.major = IMX_RMPSG_MAJOR;
> + msg->header.minor = IMX_RMPSG_MINOR;
> + msg->header.type = GPIO_RPMSG_SETUP;
> + msg->header.cmd = GPIO_RPMSG_INPUT_INIT;
> + msg->pin_idx = gpio;
> + msg->port_idx = port->idx;
> +
> + msg->out.event = GPIO_RPMSG_TRI_IGNORE;
> + msg->in.wakeup = 0;
> +
> + return gpio_send_message(port, msg, true);
> +}
> +
> +static inline void imx_rpmsg_gpio_direction_output_init(struct gpio_chip *gc,
> + unsigned int gpio, int val, struct gpio_rpmsg_data *msg)
> +{
> + struct imx_rpmsg_gpio_port *port = gpiochip_get_data(gc);
> +
> + msg->header.cate = IMX_RPMSG_GPIO;
> + msg->header.major = IMX_RMPSG_MAJOR;
> + msg->header.minor = IMX_RMPSG_MINOR;
> + msg->header.type = GPIO_RPMSG_SETUP;
> + msg->header.cmd = GPIO_RPMSG_OUTPUT_INIT;
> + msg->pin_idx = gpio;
> + msg->port_idx = port->idx;
> + msg->out.value = val;
> +}
> +
> +static int imx_rpmsg_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
> +{
> + struct imx_rpmsg_gpio_port *port = gpiochip_get_data(gc);
> + struct gpio_rpmsg_data *msg = NULL;
> +
> + guard(mutex)(&port->info.lock);
> +
> + msg = gpio_get_pin_msg(port, gpio);
> + imx_rpmsg_gpio_direction_output_init(gc, gpio, val, msg);
> +
> + return gpio_send_message(port, msg, true);
> +}
> +
> +static int imx_rpmsg_gpio_direction_output(struct gpio_chip *gc,
> + unsigned int gpio, int val)
> +{
> + struct imx_rpmsg_gpio_port *port = gpiochip_get_data(gc);
> + struct gpio_rpmsg_data *msg = NULL;
> +
> + guard(mutex)(&port->info.lock);
> +
> + msg = gpio_get_pin_msg(port, gpio);
> + imx_rpmsg_gpio_direction_output_init(gc, gpio, val, msg);
> +
> + return gpio_send_message(port, msg, true);
> +}
> +
> +static int imx_rpmsg_irq_set_type(struct irq_data *d, u32 type)
> +{
> + struct imx_rpmsg_gpio_port *port = irq_data_get_irq_chip_data(d);
> + u32 gpio_idx = d->hwirq;
> + int edge = 0;
> + int ret = 0;
> +
> + switch (type) {
> + case IRQ_TYPE_EDGE_RISING:
> + edge = GPIO_RPMSG_TRI_RISING;
> + break;
> + case IRQ_TYPE_EDGE_FALLING:
> + edge = GPIO_RPMSG_TRI_FALLING;
> + break;
> + case IRQ_TYPE_EDGE_BOTH:
> + edge = GPIO_RPMSG_TRI_BOTH_EDGE;
> + break;
> + case IRQ_TYPE_LEVEL_LOW:
> + edge = GPIO_RPMSG_TRI_LOW_LEVEL;
> + break;
> + case IRQ_TYPE_LEVEL_HIGH:
> + edge = GPIO_RPMSG_TRI_HIGH_LEVEL;
> + break;
> + default:
> + ret = -EINVAL;
> + break;
> + }
> +
> + port->gpio_pins[gpio_idx].irq_type = edge;
> +
> + return ret;
> +}
> +
> +static int imx_rpmsg_irq_set_wake(struct irq_data *d, u32 enable)
> +{
> + struct imx_rpmsg_gpio_port *port = irq_data_get_irq_chip_data(d);
> + u32 gpio_idx = d->hwirq;
> +
> + port->gpio_pins[gpio_idx].irq_wake_enable = enable;
> +
> + return 0;
> +}
> +
> +/*
> + * This function will be called at:
> + * - one interrupt setup.
> + * - the end of one interrupt happened
> + * The gpio over rpmsg driver will not write the real register, so save
> + * all infos before this function and then send all infos to M core in this
> + * step.
> + */
> +static void imx_rpmsg_unmask_irq(struct irq_data *d)
> +{
> + struct imx_rpmsg_gpio_port *port = irq_data_get_irq_chip_data(d);
> + u32 gpio_idx = d->hwirq;
> +
> + port->gpio_pins[gpio_idx].irq_unmask = 1;
> +}
> +
> +static void imx_rpmsg_mask_irq(struct irq_data *d)
> +{
> + struct imx_rpmsg_gpio_port *port = irq_data_get_irq_chip_data(d);
> + u32 gpio_idx = d->hwirq;
> + /*
> + * No need to implement the callback at A core side.
> + * M core will mask interrupt after a interrupt occurred, and then
> + * sends a notify to A core.
> + * After A core dealt with the notify, A core will send a rpmsg to
> + * M core to unmask this interrupt again.
> + */
> + port->gpio_pins[gpio_idx].irq_mask = 1;
> +}
> +
> +static void imx_rpmsg_irq_shutdown(struct irq_data *d)
> +{
> + struct imx_rpmsg_gpio_port *port = irq_data_get_irq_chip_data(d);
> + u32 gpio_idx = d->hwirq;
> +
> + port->gpio_pins[gpio_idx].irq_shutdown = 1;
> +}
> +
> +static void imx_rpmsg_irq_bus_lock(struct irq_data *d)
> +{
> + struct imx_rpmsg_gpio_port *port = irq_data_get_irq_chip_data(d);
> +
> + mutex_lock(&port->info.lock);
> +}
> +
> +static void imx_rpmsg_irq_bus_sync_unlock(struct irq_data *d)
> +{
> + struct imx_rpmsg_gpio_port *port = irq_data_get_irq_chip_data(d);
> + struct gpio_rpmsg_data *msg = NULL;
> + u32 gpio_idx = d->hwirq;
> +
> + if (port == NULL) {
> + mutex_unlock(&port->info.lock);
> + return;
> + }
> +
> + /*
> + * For mask irq, do nothing here.
> + * M core will mask interrupt after a interrupt occurred, and then
> + * sends a notify to A core.
> + * After A core dealt with the notify, A core will send a rpmsg to
> + * M core to unmask this interrupt again.
> + */
> +
> + if (port->gpio_pins[gpio_idx].irq_mask && !port->gpio_pins[gpio_idx].irq_unmask) {
> + port->gpio_pins[gpio_idx].irq_mask = 0;
> + mutex_unlock(&port->info.lock);
> + return;
> + }
> +
> + msg = gpio_get_pin_msg(port, gpio_idx);
> + msg->header.cate = IMX_RPMSG_GPIO;
> + msg->header.major = IMX_RMPSG_MAJOR;
> + msg->header.minor = IMX_RMPSG_MINOR;
> + msg->header.type = GPIO_RPMSG_SETUP;
> + msg->header.cmd = GPIO_RPMSG_INPUT_INIT;
> + msg->pin_idx = gpio_idx;
> + msg->port_idx = port->idx;
> +
> + if (port->gpio_pins[gpio_idx].irq_shutdown) {
> + msg->out.event = GPIO_RPMSG_TRI_IGNORE;
> + msg->in.wakeup = 0;
> + port->gpio_pins[gpio_idx].irq_shutdown = 0;
> + } else {
> + /* if not set irq type, then use low level as trigger type */
> + msg->out.event = port->gpio_pins[gpio_idx].irq_type;
> + if (!msg->out.event)
> + msg->out.event = GPIO_RPMSG_TRI_LOW_LEVEL;
> + if (port->gpio_pins[gpio_idx].irq_unmask) {
> + msg->in.wakeup = 0;
> + port->gpio_pins[gpio_idx].irq_unmask = 0;
> + } else /* irq set wake */
> + msg->in.wakeup = port->gpio_pins[gpio_idx].irq_wake_enable;
> + }
> +
> + gpio_send_message(port, msg, false);
> + mutex_unlock(&port->info.lock);
> +}
> +
> +static const struct irq_chip imx_rpmsg_irq_chip = {
> + .irq_mask = imx_rpmsg_mask_irq,
> + .irq_unmask = imx_rpmsg_unmask_irq,
> + .irq_set_wake = imx_rpmsg_irq_set_wake,
> + .irq_set_type = imx_rpmsg_irq_set_type,
> + .irq_shutdown = imx_rpmsg_irq_shutdown,
> + .irq_bus_lock = imx_rpmsg_irq_bus_lock,
> + .irq_bus_sync_unlock = imx_rpmsg_irq_bus_sync_unlock,
> + .flags = IRQCHIP_IMMUTABLE,
> +};
> +
> +static int imx_rpmsg_gpio_callback(struct rpmsg_device *rpdev,
> + void *data, int len, void *priv, u32 src)
> +{
> + struct gpio_rpmsg_data *msg = (struct gpio_rpmsg_data *)data;
> + struct imx_rpmsg_gpio_port *port = NULL;
> + struct imx_rpmsg_driver_data *drvdata;
> + unsigned long flags;
> +
> + drvdata = dev_get_drvdata(&rpdev->dev);
> + if (msg)
> + port = drvdata->channel_devices[msg->port_idx];
> +
> + if (!port)
> + return -ENODEV;
> +
> + if (msg->header.type == GPIO_RPMSG_REPLY) {
> + port->info.reply_msg = msg;
> + complete(&port->info.cmd_complete);
> + } else if (msg->header.type == GPIO_RPMSG_NOTIFY) {
> + port->info.notify_msg = msg;
> + local_irq_save(flags);
> + generic_handle_domain_irq(port->gc.irq.domain, msg->pin_idx);
> + local_irq_restore(flags);
> + } else
> + dev_err(&rpdev->dev, "wrong command type!\n");
> +
> + return 0;
> +}
> +
> +static void imx_rpmsg_gpio_remove_action(void *data)
> +{
> + struct imx_rpmsg_gpio_port *port = data;
> +
> + port->info.port_store[port->idx] = 0;
> +}
> +
> +static int imx_rpmsg_gpio_probe(struct platform_device *pdev)
> +{
> + struct imx_rpmsg_driver_data *pltdata = pdev->dev.platform_data;
> + struct device_node *np = pdev->dev.of_node;
> + struct imx_rpmsg_gpio_port *port;
> + struct gpio_irq_chip *girq;
> + struct gpio_chip *gc;
> + int ret;
> +
> + if (!pltdata)
> + return -EPROBE_DEFER;
> +
> + port = devm_kzalloc(&pdev->dev, sizeof(*port), GFP_KERNEL);
> + if (!port)
> + return -ENOMEM;
> +
> + ret = of_property_read_u32(np, "reg", &port->idx);
> + if (ret)
> + return ret;
> +
> + if (port->idx > MAX_DEV_PER_CHANNEL)
> + return -EINVAL;
> +
> + mutex_init(&port->info.lock);
> + init_completion(&port->info.cmd_complete);
> + port->info.rpdev = pltdata->rpdev;
> + port->info.port_store = pltdata->channel_devices;
> + port->info.port_store[port->idx] = port;
> + if (!pltdata->rx_callback)
> + pltdata->rx_callback = imx_rpmsg_gpio_callback;
> +
> + gc = &port->gc;
> + gc->owner = THIS_MODULE;
> + gc->parent = &pltdata->rpdev->dev;
> + gc->label = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s-gpio%d",
> + pltdata->rproc_name, port->idx);
> + gc->ngpio = IMX_RPMSG_GPIO_PER_PORT;
> + gc->base = -1;
> +
> + gc->direction_input = imx_rpmsg_gpio_direction_input;
> + gc->direction_output = imx_rpmsg_gpio_direction_output;
> + gc->get = imx_rpmsg_gpio_get;
> + gc->set = imx_rpmsg_gpio_set;
> +
> + platform_set_drvdata(pdev, port);
> + girq = &gc->irq;
> + gpio_irq_chip_set_chip(girq, &imx_rpmsg_irq_chip);
> + girq->parent_handler = NULL;
> + girq->num_parents = 0;
> + girq->parents = NULL;
> + girq->chip->name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s-gpio%d",
> + pltdata->rproc_name, port->idx);
> +
> + devm_add_action_or_reset(&pdev->dev, imx_rpmsg_gpio_remove_action, port);
> +
> + return devm_gpiochip_add_data(&pdev->dev, gc, port);
> +}
> +
> +static const struct of_device_id imx_rpmsg_gpio_dt_ids[] = {
> + { .compatible = "fsl,imx-rpmsg-gpio" },
> + { /* sentinel */ }
> +};
> +
> +static struct platform_driver imx_rpmsg_gpio_driver = {
> + .driver = {
> + .name = "gpio-imx-rpmsg",
> + .of_match_table = imx_rpmsg_gpio_dt_ids,
> + },
> + .probe = imx_rpmsg_gpio_probe,
> +};
> +
> +module_platform_driver(imx_rpmsg_gpio_driver);
This implementation seems strange to me.
You have a platform driver, but your RPMsg driver appears split between
this driver
and the remoteproc driver, especially regarding the
imx_rpmsg_endpoint_probe() function.
From my point of view, this driver should declare both a
platform_driver and an
rpmsg_driver structures.
Your imx_rpmsg_gpio_driver platform driver should be probed by your
remoteproc platform.
This platform driver would be responsible for:
- Parsing the device tree node
- Registering the RPMsg driver
Then, the RPMsg device should be probed either by the remote processor
using the name service
announcement mechanism or if not possible by your remoteproc driver.
To better understand my proposal you can have a look to [1]and [2].
Here is another example for an rpmsg_i2c( ST downstream implementation):
https://github.com/STMicroelectronics/linux/blob/v6.6-stm32mp/drivers/i2c/busses/i2c-rpmsg.c
https://github.com/STMicroelectronics/linux/blob/v6.6-stm32mp/Documentation/devicetree/bindings/i2c/i2c-rpmsg.yaml
Thanks and Regards,
Arnaud
> +
> +MODULE_AUTHOR("NXP Semiconductor");
> +MODULE_DESCRIPTION("NXP i.MX SoC rpmsg gpio driver");
> +MODULE_LICENSE("GPL");
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH v2 3/4] gpio: imx-rpmsg: add imx-rpmsg GPIO driver
2025-10-03 7:40 ` Arnaud POULIQUEN
@ 2025-10-03 18:41 ` Shenwei Wang
2025-10-06 9:52 ` Arnaud POULIQUEN
0 siblings, 1 reply; 18+ messages in thread
From: Shenwei Wang @ 2025-10-03 18:41 UTC (permalink / raw)
To: Arnaud POULIQUEN, Bjorn Andersson, Mathieu Poirier, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer,
Linus Walleij, Bartosz Golaszewski
Cc: Pengutronix Kernel Team, Fabio Estevam, Peng Fan,
linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org,
imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, dl-linux-imx,
openamp-rp@lists.openampproject.org
Hi Arnaud,
> -----Original Message-----
> From: Arnaud POULIQUEN <arnaud.pouliquen@foss.st.com>
> Sent: Friday, October 3, 2025 2:40 AM
> To: Shenwei Wang <shenwei.wang@nxp.com>; Bjorn Andersson
> <andersson@kernel.org>; Mathieu Poirier <mathieu.poirier@linaro.org>; Rob
> Herring <robh@kernel.org>; Krzysztof Kozlowski <krzk+dt@kernel.org>; Conor
> Dooley <conor+dt@kernel.org>; Shawn Guo <shawnguo@kernel.org>; Sascha
> Hauer <s.hauer@pengutronix.de>; Linus Walleij <linus.walleij@linaro.org>;
> Bartosz Golaszewski <brgl@bgdev.pl>
> Cc: Pengutronix Kernel Team <kernel@pengutronix.de>; Fabio Estevam
> <festevam@gmail.com>; Peng Fan <peng.fan@nxp.com>; linux-
> remoteproc@vger.kernel.org; devicetree@vger.kernel.org; imx@lists.linux.dev;
> > These processors communicate via the RPMSG protocol.
> > The driver implements the standard GPIO interface, allowing the Linux
> > side to control GPIO controllers which reside in the remote processor
> > via RPMSG protocol.
>
> What about my request in previous version to make this driver generic?
>
The only platform-dependent part of this driver is the layout of the message packet, which defines the
communication protocol between the host and the remote processor. It would be challenging to require
other vendors to follow our protocol and conform to the expected behavior.
> In ST we have similar driver in downstream, we would be interested in reusing it if
> generic. Indeed we need some rpmsg mechanism for gpio-interrupt. Today we
> have a downstream rpmsg driver [1][2] that could migrate on a generic rpmsg-
> gpio driver.
>
> > +
> > +#include <linux/err.h>
> > +#include <linux/gpio/driver.h>
> > +#include <linux/rpmsg/imx_rpmsg.h>
> > +#include <linux/init.h>
> > +#include <linux/irqdomain.h>
> > +#include <linux/of.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/rpmsg.h>
> > +
> > +#define IMX_RPMSG_GPIO_PER_PORT 32
> > +#define RPMSG_TIMEOUT 1000
> > +
> > +enum gpio_input_trigger_type {
> > + GPIO_RPMSG_TRI_IGNORE,
> > + GPIO_RPMSG_TRI_RISING,
> > + GPIO_RPMSG_TRI_FALLING,
> > + GPIO_RPMSG_TRI_BOTH_EDGE,
> > + GPIO_RPMSG_TRI_LOW_LEVEL,
> > + GPIO_RPMSG_TRI_HIGH_LEVEL,
> > +};
> What about taking inspiration from the|IRQ_TYPE|bitfield defined in|irq.h|?
> For instance:
> GPIO_RPMSG_TRI_BOTH_EDGE = GPIO_RPMSG_TRI_FALLING |
> GPIO_RPMSG_TRI_RISING,
Yes, the suggestion is better.
> > +
> > +enum gpio_rpmsg_header_type {
> > + GPIO_RPMSG_SETUP,
> > + GPIO_RPMSG_REPLY,
> > + GPIO_RPMSG_NOTIFY,
> > +};
> > +
> > +enum gpio_rpmsg_header_cmd {
> > + GPIO_RPMSG_INPUT_INIT,
> > + GPIO_RPMSG_OUTPUT_INIT,
> > + GPIO_RPMSG_INPUT_GET,
> > +};
> > +
> > +struct gpio_rpmsg_data {
> > + struct imx_rpmsg_head header;
> > + u8 pin_idx;
> > + u8 port_idx;
> > + union {
> > + u8 event;
> > + u8 retcode;
> > + u8 value;
> > + } out;
> > + union {
> > + u8 wakeup;
> > + u8 value;
> nitpicking put "value" field out of union as common
I'm afraid we can't make it common, as the two 'value' fields serve different purposes-one is used for outgoing messages and
the other for incoming messages-and they are located in different parts of the packet.
> > + } in;
> > +} __packed __aligned(8);
>
> Any reason to pack it an align it?
> This structure will be copied in the RPMSg payload, right?
>
Yes. The message will then be transmitted via the MU hardware to the remote processor, so proper alignment is required.
> I also wonder if that definition should not be in a header file with double licensing
> that the DT. Indeed this need to be common with the remote side
> implementation that can be non GPL implementation.
>
> > +
> > +struct imx_rpmsg_gpio_pin {
> > + u8 irq_shutdown;
> > + u8 irq_unmask;
> > + u8 irq_mask;
> > + u32 irq_wake_enable;
> > + u32 irq_type;
> > + struct gpio_rpmsg_data msg;
> > +};
> > +
> > +struct imx_gpio_rpmsg_info {
> > + struct rpmsg_device *rpdev;
> > + struct gpio_rpmsg_data *notify_msg;
> > + struct gpio_rpmsg_data *reply_msg;
> > + struct completion cmd_complete;
> > + struct mutex lock;
> > + msg->pin_idx = gpio;
> > + msg->port_idx = port->idx;
> > +
> > + ret = gpio_send_message(port, msg, true);
> > + if (!ret)
> > + ret = !!port->gpio_pins[gpio].msg.in.value;
> Does this code is save? !! return a boolean right?
> why not force to 1 if greater that 1?
>
This approach is intended to simplify the implementation. Forcing to 1 would introduce an additional condition check.
I'm open to changing it if that's considered standard practice.
> > +
> > + return ret;
> > +}
> > +
> > +static int imx_rpmsg_gpio_direction_input(struct gpio_chip *gc,
> > + unsigned int gpio) {
> > + struct imx_rpmsg_gpio_port *port = gpiochip_get_data(gc);
> > + struct gpio_rpmsg_data *msg = NULL;
> > +
> > + guard(mutex)(&port->info.lock);
> > +
> > + msg = gpio_get_pin_msg(port, gpio);
> > + msg->header.cate = IMX_RPMSG_GPIO;
> Do you use a single rpmsg channel for several feature?
> Any reason to not use one rpmsg channel per feature category?
>
The current implementation on the remote side uses a single channel to handle all GPIO controllers.
However, this driver itself does not have that limitation.
> > + msg->header.major = IMX_RMPSG_MAJOR;
> > + msg->header.minor = IMX_RMPSG_MINOR;
> > + msg->header.type = GPIO_RPMSG_SETUP;
> > + msg->header.cmd = GPIO_RPMSG_INPUT_INIT;
> > + msg->pin_idx = gpio;
> > + msg->port_idx = port->idx;
> > +
> > + msg->out.event = GPIO_RPMSG_TRI_IGNORE;
> > + msg->in.wakeup = 0;
> > +
> > + return gpio_send_message(port, msg, true); }
> > +
> > +static inline void imx_rpmsg_gpio_direction_output_init(struct gpio_chip *gc,
> > + unsigned int gpio, int val, struct gpio_rpmsg_data *msg)
> > +
> > +static struct platform_driver imx_rpmsg_gpio_driver = {
> > + .driver = {
> > + .name = "gpio-imx-rpmsg",
> > + .of_match_table = imx_rpmsg_gpio_dt_ids,
> > + },
> > + .probe = imx_rpmsg_gpio_probe,
> > +};
> > +
> > +module_platform_driver(imx_rpmsg_gpio_driver);
> This implementation seems strange to me.
> You have a platform driver, but your RPMsg driver appears split between this
> driver and the remoteproc driver, especially regarding the
> imx_rpmsg_endpoint_probe() function.
>
See my reply below.
> From my point of view, this driver should declare both a platform_driver and an
> rpmsg_driver structures.
>
> Your imx_rpmsg_gpio_driver platform driver should be probed by your
> remoteproc platform.
> This platform driver would be responsible for:
> - Parsing the device tree node
> - Registering the RPMsg driver
>
> Then, the RPMsg device should be probed either by the remote processor using
> the name service announcement mechanism or if not possible by your
> remoteproc driver.
>
The idea is to probe the GPIO driver successfully only after the remote processor is online and has sent the name service announcement.
Until then, the GPIO driver will remain in a deferred state, ensuring that all consumers of the associated GPIOs are also deferred.
The implementation you provided below does not guarantee that the related consumers will be properly deferred. This is the most
important behavior for a GPIO/I2C controllers.
Thanks,
Shenwei
> To better understand my proposal you can have a look to [1]and [2].
> Here is another example for an rpmsg_i2c( ST downstream implementation):
> https://github.co/
> m%2FSTMicroelectronics%2Flinux%2Fblob%2Fv6.6-
> stm32mp%2Fdrivers%2Fi2c%2Fbusses%2Fi2c-
> rpmsg.c&data=05%7C02%7Cshenwei.wang%40nxp.com%7C22a9c88be60b474e
> 391008de02502ec7%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C63
> 8950740622597592%7CUnknown%7CTWFpbGZsb3d8eyJFbXB0eU1hcGkiOnRyd
> WUsIlYiOiIwLjAuMDAwMCIsIlAiOiJXaW4zMiIsIkFOIjoiTWFpbCIsIldUIjoyfQ%3D%
> 3D%7C0%7C%7C%7C&sdata=6lCk20Qhb%2F0MTw0NFtto7tj7EFYwZ%2BlOR1F3
> Qk7kQn8%3D&reserved=0
> https://github.co/
> m%2FSTMicroelectronics%2Flinux%2Fblob%2Fv6.6-
> stm32mp%2FDocumentation%2Fdevicetree%2Fbindings%2Fi2c%2Fi2c-
> rpmsg.yaml&data=05%7C02%7Cshenwei.wang%40nxp.com%7C22a9c88be60b4
> 74e391008de02502ec7%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7
> C638950740622612512%7CUnknown%7CTWFpbGZsb3d8eyJFbXB0eU1hcGkiOnR
> ydWUsIlYiOiIwLjAuMDAwMCIsIlAiOiJXaW4zMiIsIkFOIjoiTWFpbCIsIldUIjoyfQ%3D
> %3D%7C0%7C%7C%7C&sdata=4Gva%2FpqP2u8T57XDxSDaoHhvDeJ%2Fo5HtAB
> L9TY5gbDI%3D&reserved=0
>
> Thanks and Regards,
> Arnaud
>
> > +
> > +MODULE_AUTHOR("NXP Semiconductor");
> > +MODULE_DESCRIPTION("NXP i.MX SoC rpmsg gpio driver");
> > +MODULE_LICENSE("GPL");
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH v2 3/4] gpio: imx-rpmsg: add imx-rpmsg GPIO driver
2025-10-03 18:41 ` Shenwei Wang
@ 2025-10-06 9:52 ` Arnaud POULIQUEN
2025-10-06 14:33 ` Shenwei Wang
0 siblings, 1 reply; 18+ messages in thread
From: Arnaud POULIQUEN @ 2025-10-06 9:52 UTC (permalink / raw)
To: Shenwei Wang, Bjorn Andersson, Mathieu Poirier, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer,
Linus Walleij, Bartosz Golaszewski
Cc: Pengutronix Kernel Team, Fabio Estevam, Peng Fan,
linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org,
imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, dl-linux-imx,
openamp-rp@lists.openampproject.org
On 10/3/25 20:41, Shenwei Wang wrote:
> Hi Arnaud,
>
>> -----Original Message-----
>> From: Arnaud POULIQUEN <arnaud.pouliquen@foss.st.com>
>> Sent: Friday, October 3, 2025 2:40 AM
>> To: Shenwei Wang <shenwei.wang@nxp.com>; Bjorn Andersson
>> <andersson@kernel.org>; Mathieu Poirier <mathieu.poirier@linaro.org>; Rob
>> Herring <robh@kernel.org>; Krzysztof Kozlowski <krzk+dt@kernel.org>; Conor
>> Dooley <conor+dt@kernel.org>; Shawn Guo <shawnguo@kernel.org>; Sascha
>> Hauer <s.hauer@pengutronix.de>; Linus Walleij <linus.walleij@linaro.org>;
>> Bartosz Golaszewski <brgl@bgdev.pl>
>> Cc: Pengutronix Kernel Team <kernel@pengutronix.de>; Fabio Estevam
>> <festevam@gmail.com>; Peng Fan <peng.fan@nxp.com>; linux-
>> remoteproc@vger.kernel.org; devicetree@vger.kernel.org; imx@lists.linux.dev;
>>> These processors communicate via the RPMSG protocol.
>>> The driver implements the standard GPIO interface, allowing the Linux
>>> side to control GPIO controllers which reside in the remote processor
>>> via RPMSG protocol.
>> What about my request in previous version to make this driver generic?
>>
> The only platform-dependent part of this driver is the layout of the message packet, which defines the
> communication protocol between the host and the remote processor. It would be challenging to require
> other vendors to follow our protocol and conform to the expected behavior.
>
>> In ST we have similar driver in downstream, we would be interested in reusing it if
>> generic. Indeed we need some rpmsg mechanism for gpio-interrupt. Today we
>> have a downstream rpmsg driver [1][2] that could migrate on a generic rpmsg-
>> gpio driver.
>>
>>> +
>>> +#include <linux/err.h>
>>> +#include <linux/gpio/driver.h>
>>> +#include <linux/rpmsg/imx_rpmsg.h>
>>> +#include <linux/init.h>
>>> +#include <linux/irqdomain.h>
>>> +#include <linux/of.h>
>>> +#include <linux/platform_device.h>
>>> +#include <linux/rpmsg.h>
>>> +
>>> +#define IMX_RPMSG_GPIO_PER_PORT 32
>>> +#define RPMSG_TIMEOUT 1000
>>> +
>>> +enum gpio_input_trigger_type {
>>> + GPIO_RPMSG_TRI_IGNORE,
>>> + GPIO_RPMSG_TRI_RISING,
>>> + GPIO_RPMSG_TRI_FALLING,
>>> + GPIO_RPMSG_TRI_BOTH_EDGE,
>>> + GPIO_RPMSG_TRI_LOW_LEVEL,
>>> + GPIO_RPMSG_TRI_HIGH_LEVEL,
>>> +};
>> What about taking inspiration from the|IRQ_TYPE|bitfield defined in|irq.h|?
>> For instance:
>> GPIO_RPMSG_TRI_BOTH_EDGE = GPIO_RPMSG_TRI_FALLING |
>> GPIO_RPMSG_TRI_RISING,
> Yes, the suggestion is better.
>
>>> +
>>> +enum gpio_rpmsg_header_type {
>>> + GPIO_RPMSG_SETUP,
>>> + GPIO_RPMSG_REPLY,
>>> + GPIO_RPMSG_NOTIFY,
>>> +};
>>> +
>>> +enum gpio_rpmsg_header_cmd {
>>> + GPIO_RPMSG_INPUT_INIT,
>>> + GPIO_RPMSG_OUTPUT_INIT,
>>> + GPIO_RPMSG_INPUT_GET,
>>> +};
>>> +
>>> +struct gpio_rpmsg_data {
>>> + struct imx_rpmsg_head header;
>>> + u8 pin_idx;
>>> + u8 port_idx;
>>> + union {
>>> + u8 event;
>>> + u8 retcode;
>>> + u8 value;
>>> + } out;
>>> + union {
>>> + u8 wakeup;
>>> + u8 value;
>> nitpicking put "value" field out of union as common
> I'm afraid we can't make it common, as the two 'value' fields serve different purposes-one is used for outgoing messages and
> the other for incoming messages-and they are located in different parts of the packet.
>
>>> + } in;
>>> +} __packed __aligned(8);
>> Any reason to pack it an align it?
>> This structure will be copied in the RPMSg payload, right?
>>
> Yes. The message will then be transmitted via the MU hardware to the remote processor, so proper alignment is required.
>
>> I also wonder if that definition should not be in a header file with double licensing
>> that the DT. Indeed this need to be common with the remote side
>> implementation that can be non GPL implementation.
>>
>>> +
>>> +struct imx_rpmsg_gpio_pin {
>>> + u8 irq_shutdown;
>>> + u8 irq_unmask;
>>> + u8 irq_mask;
>>> + u32 irq_wake_enable;
>>> + u32 irq_type;
>>> + struct gpio_rpmsg_data msg;
>>> +};
>>> +
>>> +struct imx_gpio_rpmsg_info {
>>> + struct rpmsg_device *rpdev;
>>> + struct gpio_rpmsg_data *notify_msg;
>>> + struct gpio_rpmsg_data *reply_msg;
>>> + struct completion cmd_complete;
>>> + struct mutex lock;
>>> + msg->pin_idx = gpio;
>>> + msg->port_idx = port->idx;
>>> +
>>> + ret = gpio_send_message(port, msg, true);
>>> + if (!ret)
>>> + ret = !!port->gpio_pins[gpio].msg.in.value;
>> Does this code is save? !! return a boolean right?
>> why not force to 1 if greater that 1?
>>
> This approach is intended to simplify the implementation. Forcing to 1 would introduce an additional condition check.
> I'm open to changing it if that's considered standard practice.
>
>>> +
>>> + return ret;
>>> +}
>>> +
>>> +static int imx_rpmsg_gpio_direction_input(struct gpio_chip *gc,
>>> + unsigned int gpio) {
>>> + struct imx_rpmsg_gpio_port *port = gpiochip_get_data(gc);
>>> + struct gpio_rpmsg_data *msg = NULL;
>>> +
>>> + guard(mutex)(&port->info.lock);
>>> +
>>> + msg = gpio_get_pin_msg(port, gpio);
>>> + msg->header.cate = IMX_RPMSG_GPIO;
>> Do you use a single rpmsg channel for several feature?
>> Any reason to not use one rpmsg channel per feature category?
>>
> The current implementation on the remote side uses a single channel to handle all GPIO controllers.
> However, this driver itself does not have that limitation.
>
>>> + msg->header.major = IMX_RMPSG_MAJOR;
>>> + msg->header.minor = IMX_RMPSG_MINOR;
>>> + msg->header.type = GPIO_RPMSG_SETUP;
>>> + msg->header.cmd = GPIO_RPMSG_INPUT_INIT;
>>> + msg->pin_idx = gpio;
>>> + msg->port_idx = port->idx;
>>> +
>>> + msg->out.event = GPIO_RPMSG_TRI_IGNORE;
>>> + msg->in.wakeup = 0;
>>> +
>>> + return gpio_send_message(port, msg, true); }
>>> +
>>> +static inline void imx_rpmsg_gpio_direction_output_init(struct gpio_chip *gc,
>>> + unsigned int gpio, int val, struct gpio_rpmsg_data *msg)
>>> +
>>> +static struct platform_driver imx_rpmsg_gpio_driver = {
>>> + .driver = {
>>> + .name = "gpio-imx-rpmsg",
>>> + .of_match_table = imx_rpmsg_gpio_dt_ids,
>>> + },
>>> + .probe = imx_rpmsg_gpio_probe,
>>> +};
>>> +
>>> +module_platform_driver(imx_rpmsg_gpio_driver);
>> This implementation seems strange to me.
>> You have a platform driver, but your RPMsg driver appears split between this
>> driver and the remoteproc driver, especially regarding the
>> imx_rpmsg_endpoint_probe() function.
>>
> See my reply below.
>
>> From my point of view, this driver should declare both a platform_driver and an
>> rpmsg_driver structures.
>>
>> Your imx_rpmsg_gpio_driver platform driver should be probed by your
>> remoteproc platform.
>> This platform driver would be responsible for:
>> - Parsing the device tree node
>> - Registering the RPMsg driver
>>
>> Then, the RPMsg device should be probed either by the remote processor using
>> the name service announcement mechanism or if not possible by your
>> remoteproc driver.
>>
> The idea is to probe the GPIO driver successfully only after the remote processor is online and has sent the name service announcement.
> Until then, the GPIO driver will remain in a deferred state, ensuring that all consumers of the associated GPIOs are also deferred.
> The implementation you provided below does not guarantee that the related consumers will be properly deferred. This is the most
> important behavior for a GPIO/I2C controllers.
As long as you keep the GPIO/I2C device as a child of the remote
processor node,
you should not have deferred probe issues.
The|of_platform_populate()|function ensures
that the I2C/GPIO devices are probed when the remote processor is started.
Calling|devm_gpiochip_add_data|in the RPMsg driver probe should also
prevent such issues.
Regards,
Arnaud
>
> Thanks,
> Shenwei
>
>> To better understand my proposal you can have a look to [1]and [2].
>> Here is another example for an rpmsg_i2c( ST downstream implementation):
>> https://github.co/
>> m%2FSTMicroelectronics%2Flinux%2Fblob%2Fv6.6-
>> stm32mp%2Fdrivers%2Fi2c%2Fbusses%2Fi2c-
>> rpmsg.c&data=05%7C02%7Cshenwei.wang%40nxp.com%7C22a9c88be60b474e
>> 391008de02502ec7%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C63
>> 8950740622597592%7CUnknown%7CTWFpbGZsb3d8eyJFbXB0eU1hcGkiOnRyd
>> WUsIlYiOiIwLjAuMDAwMCIsIlAiOiJXaW4zMiIsIkFOIjoiTWFpbCIsIldUIjoyfQ%3D%
>> 3D%7C0%7C%7C%7C&sdata=6lCk20Qhb%2F0MTw0NFtto7tj7EFYwZ%2BlOR1F3
>> Qk7kQn8%3D&reserved=0
>> https://github.co/
>> m%2FSTMicroelectronics%2Flinux%2Fblob%2Fv6.6-
>> stm32mp%2FDocumentation%2Fdevicetree%2Fbindings%2Fi2c%2Fi2c-
>> rpmsg.yaml&data=05%7C02%7Cshenwei.wang%40nxp.com%7C22a9c88be60b4
>> 74e391008de02502ec7%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7
>> C638950740622612512%7CUnknown%7CTWFpbGZsb3d8eyJFbXB0eU1hcGkiOnR
>> ydWUsIlYiOiIwLjAuMDAwMCIsIlAiOiJXaW4zMiIsIkFOIjoiTWFpbCIsIldUIjoyfQ%3D
>> %3D%7C0%7C%7C%7C&sdata=4Gva%2FpqP2u8T57XDxSDaoHhvDeJ%2Fo5HtAB
>> L9TY5gbDI%3D&reserved=0
>>
>> Thanks and Regards,
>> Arnaud
>>
>>> +
>>> +MODULE_AUTHOR("NXP Semiconductor");
>>> +MODULE_DESCRIPTION("NXP i.MX SoC rpmsg gpio driver");
>>> +MODULE_LICENSE("GPL");
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH v2 3/4] gpio: imx-rpmsg: add imx-rpmsg GPIO driver
2025-10-06 9:52 ` Arnaud POULIQUEN
@ 2025-10-06 14:33 ` Shenwei Wang
2025-10-07 9:16 ` Arnaud POULIQUEN
0 siblings, 1 reply; 18+ messages in thread
From: Shenwei Wang @ 2025-10-06 14:33 UTC (permalink / raw)
To: Arnaud POULIQUEN, Bjorn Andersson, Mathieu Poirier, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer,
Linus Walleij, Bartosz Golaszewski
Cc: Pengutronix Kernel Team, Fabio Estevam, Peng Fan,
linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org,
imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, dl-linux-imx,
openamp-rp@lists.openampproject.org
Hi Arnaud,
> -----Original Message-----
> From: Arnaud POULIQUEN <arnaud.pouliquen@foss.st.com>
> Sent: Monday, October 6, 2025 4:53 AM
> To: Shenwei Wang <shenwei.wang@nxp.com>; Bjorn Andersson
> <andersson@kernel.org>; Mathieu Poirier <mathieu.poirier@linaro.org>; Rob
> Herring <robh@kernel.org>; Krzysztof Kozlowski <krzk+dt@kernel.org>; Conor
> Dooley <conor+dt@kernel.org>; Shawn Guo <shawnguo@kernel.org>; Sascha
> Hauer <s.hauer@pengutronix.de>; Linus Walleij <linus.walleij@linaro.org>;
> Bartosz Golaszewski <brgl@bgdev.pl>
> Cc: Pengutronix Kernel Team <kernel@pengutronix.de>; Fabio Estevam
> <festevam@gmail.com>; Peng Fan <peng.fan@nxp.com>; linux-
> remoteproc@vger.kernel.org; devicetree@vger.kernel.org; imx@lists.linux.dev;
> linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org; dl-linux-imx
> <linux-imx@nxp.com>; openamp-rp@lists.openampproject.org
> Subject: [EXT] Re: [PATCH v2 3/4] gpio: imx-rpmsg: add imx-rpmsg GPIO driver
> >> Then, the RPMsg device should be probed either by the remote
> >> processor using the name service announcement mechanism or if not
> >> possible by your remoteproc driver.
> >>
> > The idea is to probe the GPIO driver successfully only after the remote
> processor is online and has sent the name service announcement.
> > Until then, the GPIO driver will remain in a deferred state, ensuring that all
> consumers of the associated GPIOs are also deferred.
> > The implementation you provided below does not guarantee that the
> > related consumers will be properly deferred. This is the most important
> behavior for a GPIO/I2C controllers.
>
>
> As long as you keep the GPIO/I2C device as a child of the remote processor node,
> you should not have deferred probe issues.
> The|of_platform_populate()|function ensures
> that the I2C/GPIO devices are probed when the remote processor is started.
> Calling|devm_gpiochip_add_data|in the RPMsg driver probe should also
> prevent such issues.
>
Here, deferred probing is not an issue -it's an intentional feature. We need to ensure that all consumers of the GPIO/I2C controllers remain
in the deferred state until the remote processor is fully online.
For instance, consider a regulator node that references a GPIO line from the RPMSG GPIO controller. The regulator will stay in the deferred state
until the remote processor comes online and its services are announced and received.
Thanks,
Shenwei
> Regards,
> Arnaud
>
> >
> > Thanks,
> > Shenwei
> >
> >> To better understand my proposal you can have a look to [1]and [2].
> >> Here is another example for an rpmsg_i2c( ST downstream implementation):
> >> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgit
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v2 3/4] gpio: imx-rpmsg: add imx-rpmsg GPIO driver
2025-10-06 14:33 ` Shenwei Wang
@ 2025-10-07 9:16 ` Arnaud POULIQUEN
0 siblings, 0 replies; 18+ messages in thread
From: Arnaud POULIQUEN @ 2025-10-07 9:16 UTC (permalink / raw)
To: Shenwei Wang, Bjorn Andersson, Mathieu Poirier, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer,
Linus Walleij, Bartosz Golaszewski
Cc: Pengutronix Kernel Team, Fabio Estevam, Peng Fan,
linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org,
imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, dl-linux-imx,
openamp-rp@lists.openampproject.org
Hello Shenwei,
On 10/6/25 16:33, Shenwei Wang wrote:
>
> Hi Arnaud,
>
>> -----Original Message-----
>> From: Arnaud POULIQUEN <arnaud.pouliquen@foss.st.com>
>> Sent: Monday, October 6, 2025 4:53 AM
>> To: Shenwei Wang <shenwei.wang@nxp.com>; Bjorn Andersson
>> <andersson@kernel.org>; Mathieu Poirier <mathieu.poirier@linaro.org>; Rob
>> Herring <robh@kernel.org>; Krzysztof Kozlowski <krzk+dt@kernel.org>; Conor
>> Dooley <conor+dt@kernel.org>; Shawn Guo <shawnguo@kernel.org>; Sascha
>> Hauer <s.hauer@pengutronix.de>; Linus Walleij <linus.walleij@linaro.org>;
>> Bartosz Golaszewski <brgl@bgdev.pl>
>> Cc: Pengutronix Kernel Team <kernel@pengutronix.de>; Fabio Estevam
>> <festevam@gmail.com>; Peng Fan <peng.fan@nxp.com>; linux-
>> remoteproc@vger.kernel.org; devicetree@vger.kernel.org; imx@lists.linux.dev;
>> linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org; dl-linux-imx
>> <linux-imx@nxp.com>; openamp-rp@lists.openampproject.org
>> Subject: [EXT] Re: [PATCH v2 3/4] gpio: imx-rpmsg: add imx-rpmsg GPIO driver
>>>> Then, the RPMsg device should be probed either by the remote
>>>> processor using the name service announcement mechanism or if not
>>>> possible by your remoteproc driver.
>>>>
>>> The idea is to probe the GPIO driver successfully only after the remote
>> processor is online and has sent the name service announcement.
>>> Until then, the GPIO driver will remain in a deferred state, ensuring that all
>> consumers of the associated GPIOs are also deferred.
>>> The implementation you provided below does not guarantee that the
>>> related consumers will be properly deferred. This is the most important
>> behavior for a GPIO/I2C controllers.
>>
>>
>> As long as you keep the GPIO/I2C device as a child of the remote processor node,
>> you should not have deferred probe issues.
>> The|of_platform_populate()|function ensures
>> that the I2C/GPIO devices are probed when the remote processor is started.
>> Calling|devm_gpiochip_add_data|in the RPMsg driver probe should also
>> prevent such issues.
>>
>
> Here, deferred probing is not an issue -it's an intentional feature. We need to ensure that all consumers of the GPIO/I2C controllers remain
> in the deferred state until the remote processor is fully online.
>
> For instance, consider a regulator node that references a GPIO line from the RPMSG GPIO controller. The regulator will stay in the deferred state
> until the remote processor comes online and its services are announced and received.
I think there is a misunderstanding. My intention was just to mention
that in my proposal, the deferred mechanism should also work as
expected. This is the case for the rpmsg_i2c I mentioned as an example.
Anyway the main point here is to break the dependency between your
remoteproc driver and the rpmsg GPIO driver. In your remoteproc
driver, you should just call of_platform_populate, and let's the
compatible mechanism find the associated independent driver defined
in the rpmsg_gpio.c
From my perspective the sequence should be
1) the remoteproc driver starts the remote processor
2) the remoteproc driver parses the child node with of_platform_populate
3) the rpmsg_gpio platform driver is probed by the of_platform_populate
- parse the DT node and store configuration in data structure
- register an rpmsg_gpio driver
4) the rpmsg gpio driver is probed (by the rpmsg bus).
- register the GPIO and irq chips
Until step 4, the users should be automatically deferred
That said, regarding your implementation, the fact that you have created
a single rpmsg endpoint for several rpmsg services complexify this
approach , creating a dependency not only between rpmsg and remoteproc
but also among rpmsg devices. Having a single rpmsg endpoint associated
with a single rpmsg service would simplify things.
Of course, I am just sharing my opinion and expectations here. For the
next steps, I will let the maintainers, Mathieu and Bjorn, provide their
advice and guidance.
Thanks,
Arnaud
>
> Thanks,
> Shenwei
>
>> Regards,
>> Arnaud
>>
>>>
>>> Thanks,
>>> Shenwei
>>>
>>>> To better understand my proposal you can have a look to [1]and [2].
>>>> Here is another example for an rpmsg_i2c( ST downstream implementation):
>>>> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgit
^ permalink raw reply [flat|nested] 18+ messages in thread