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Fri, 9 Oct 2026 18:33:33 +0000 Date: Fri, 9 Oct 2026 13:33:29 -0500 From: Frank Li To: "Peng Fan (OSS)" Cc: Linus Walleij , Bartosz Golaszewski , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Shenwei Wang , Andy Shevchenko , linux-gpio@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Peng Fan Subject: Re: [PATCH v5 02/13] gpio: mxc: fix both_edges bit operations Message-ID: References: <20261010-gpio-mxc-cleanup-v5-0-1e59e6ddfa00@nxp.com> <20261010-gpio-mxc-cleanup-v5-2-1e59e6ddfa00@nxp.com> Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20261010-gpio-mxc-cleanup-v5-2-1e59e6ddfa00@nxp.com> X-ClientProxiedBy: FR3P281CA0070.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:4b::22) To GV2PR04MB11799.eurprd04.prod.outlook.com (2603:10a6:150:2cf::9) Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: GV2PR04MB11799:EE_|DU2PR04MB8534:EE_ X-MS-Office365-Filtering-Correlation-Id: 0c6e8ad8-a189-4079-2e69-08df2633d2e0 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|23010399003|376014|19092799006|1800799024|366016|56012099006|4143699003|11063799006|22082099003|10067099003|6133799003|18002099003; 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The IRQ core serializes per irq descriptor, but > different pins have different descriptors, so on SMP systems two > concurrent gpio_set_irq_type() calls for pins on the same port run > without mutual exclusion. > > The read-modify-write of port->both_edges is performed outside the > port-wide scoped_guard(gpio_generic_lock_irqsave) section, so > concurrent updates for different pins can overwrite each other, > causing missed interrupts or stuck IRQ lines on dual-edge triggered > pins. > > The original uniprocessor MXC SoCs were not affected; the race > became reachable on multi-core i.MX7 and i.MX8 SoCs that reuse this > driver. > > Convert both_edges from u32 to unsigned long and use set_bit(), > clear_bit(), and test_bit() to make the modifications atomic. > > Fixes: 910862ec092c ("mxc: emulate GPIO interrupt on both-edges") > Signed-off-by: Peng Fan > --- Reviewed-by: Frank Li > drivers/gpio/gpio-mxc.c | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c > index e05f276a50e8..2f83a0f076bf 100644 > --- a/drivers/gpio/gpio-mxc.c > +++ b/drivers/gpio/gpio-mxc.c > @@ -68,7 +68,7 @@ struct mxc_gpio_port { > struct irq_domain *domain; > struct gpio_generic_chip gen_gc; > struct device *dev; > - u32 both_edges; > + unsigned long both_edges; > struct mxc_gpio_reg_saved gpio_saved_reg; > bool power_off; > u32 wakeup_pads; > @@ -168,7 +168,7 @@ static int gpio_set_irq_type(struct irq_data *d, u32 type) > int edge; > void __iomem *reg = port->base; > > - port->both_edges &= ~(1 << gpio_idx); > + clear_bit(gpio_idx, &port->both_edges); > switch (type) { > case IRQ_TYPE_EDGE_RISING: > edge = GPIO_INT_RISE_EDGE; > @@ -188,7 +188,7 @@ static int gpio_set_irq_type(struct irq_data *d, u32 type) > edge = GPIO_INT_HIGH_LEV; > pr_debug("mxc: set GPIO %d to high trigger\n", gpio_idx); > } > - port->both_edges |= 1 << gpio_idx; > + set_bit(gpio_idx, &port->both_edges); > } > break; > case IRQ_TYPE_LEVEL_LOW: > @@ -259,7 +259,7 @@ static void mxc_gpio_irq_handler(struct mxc_gpio_port *port, u32 irq_stat) > while (irq_stat != 0) { > int irqoffset = fls(irq_stat) - 1; > > - if (port->both_edges & (1 << irqoffset)) > + if (test_bit(irqoffset, &port->both_edges)) > mxc_flip_edge(port, irqoffset); > > generic_handle_domain_irq(port->domain, irqoffset); > > -- > 2.51.0 > >