Linux kernel and device drivers for NXP i.MX platforms
 help / color / mirror / Atom feed
From: Andrew Lunn <andrew@lunn.ch>
To: jan.petrous@oss.nxp.com
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	Alexandre Torgue <alexandre.torgue@foss.st.com>,
	Jose Abreu <joabreu@synopsys.com>,
	"David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	Vinod Koul <vkoul@kernel.org>,
	Richard Cochran <richardcochran@gmail.com>,
	Heiner Kallweit <hkallweit1@gmail.com>,
	Russell King <linux@armlinux.org.uk>,
	Shawn Guo <shawnguo@kernel.org>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	Fabio Estevam <festevam@gmail.com>,
	Emil Renner Berthing <kernel@esmil.dk>,
	Minda Chen <minda.chen@starfivetech.com>,
	Nicolas Ferre <nicolas.ferre@microchip.com>,
	Claudiu Beznea <claudiu.beznea@tuxon.dev>,
	Iyappan Subramanian <iyappan@os.amperecomputing.com>,
	Keyur Chudgar <keyur@os.amperecomputing.com>,
	Quan Nguyen <quan@os.amperecomputing.com>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Giuseppe Cavallaro <peppe.cavallaro@st.com>,
	linux-stm32@st-md-mailman.stormreply.com,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, netdev@vger.kernel.org,
	linux-arm-msm@vger.kernel.org, imx@lists.linux.dev,
	devicetree@vger.kernel.org, NXP S32 Linux Team <s32@nxp.com>
Subject: Re: [PATCH v4 14/16] net: stmmac: dwmac-s32: add basic NXP S32G/S32R glue driver
Date: Tue, 29 Oct 2024 13:15:52 +0100	[thread overview]
Message-ID: <c902dc2a-9b2a-44a0-be1d-88fb150f4f17@lunn.ch> (raw)
In-Reply-To: <20241028-upstream_s32cc_gmac-v4-14-03618f10e3e2@oss.nxp.com>

> +#define GMAC_TX_RATE_125M	125000000	/* 125MHz */
> +#define GMAC_TX_RATE_25M	25000000	/* 25MHz */
> +#define GMAC_TX_RATE_2M5	2500000		/* 2.5MHz */

With the swap to the new helper, i think 25M and 2M5 are no longer
needed.

> +static int s32_gmac_init(struct platform_device *pdev, void *priv)
> +{
> +	struct s32_priv_data *gmac = priv;
> +	int ret;
> +
> +	ret = clk_set_rate(gmac->tx_clk, GMAC_TX_RATE_125M);
> +	if (!ret)
> +		ret = clk_prepare_enable(gmac->tx_clk);
> +
> +	if (ret) {
> +		dev_err(&pdev->dev, "Can't set tx clock\n");
> +		return ret;
> +	}
> +
> +	ret = clk_prepare_enable(gmac->rx_clk);
> +	if (ret)
> +		dev_dbg(&pdev->dev, "Can't set rx, clock source is disabled.\n");
> +	else
> +		gmac->rx_clk_enabled = true;

Why would this fail? And if it does fail, why is it not fatal? Maybe a
comment here.

> +static void s32_fix_mac_speed(void *priv, unsigned int speed, unsigned int mode)
> +{
> +	struct s32_priv_data *gmac = priv;
> +	long tx_clk_rate;
> +	int ret;
> +
> +	if (!gmac->rx_clk_enabled) {
> +		ret = clk_prepare_enable(gmac->rx_clk);
> +		if (ret) {
> +			dev_err(gmac->dev, "Can't set rx clock\n");

dev_err(), so is failing now fatal, but since this is a void function,
you cannot report the error up the call stack?

	Andrew

  parent reply	other threads:[~2024-10-29 12:16 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-28 20:24 [PATCH v4 00/16] Add support for Synopsis DWMAC IP on NXP Automotive SoCs S32G2xx/S32G3xx/S32R45 Jan Petrous via B4 Relay
2024-10-28 20:24 ` [PATCH v4 01/16] net: driver: stmmac: Fix CSR divider comment Jan Petrous via B4 Relay
2024-10-28 20:24 ` [PATCH v4 02/16] net: driver: stmmac: Extend CSR calc support Jan Petrous via B4 Relay
2024-10-28 20:24 ` [PATCH v4 03/16] net: stmmac: Fix clock rate variables size Jan Petrous via B4 Relay
2024-10-28 20:24 ` [PATCH v4 04/16] net: phy: Add helper for mapping RGMII link speed to clock rate Jan Petrous via B4 Relay
2024-10-29 12:02   ` Andrew Lunn
2024-10-28 20:24 ` [PATCH v4 05/16] net: dwmac-dwc-qos-eth: Use helper rgmii_clock Jan Petrous via B4 Relay
2024-10-29 12:02   ` Andrew Lunn
2024-11-05 13:42   ` Simon Horman
2024-11-11 13:50     ` Jan Petrous
2024-10-28 20:24 ` [PATCH v4 06/16] net: dwmac-imx: " Jan Petrous via B4 Relay
2024-10-29 12:03   ` Andrew Lunn
2024-10-28 20:24 ` [PATCH v4 07/16] net: dwmac-intel-plat: " Jan Petrous via B4 Relay
2024-10-29 12:03   ` Andrew Lunn
2024-10-28 20:24 ` [PATCH v4 08/16] net: dwmac-rk: " Jan Petrous via B4 Relay
2024-10-29 12:03   ` Andrew Lunn
2024-10-28 20:24 ` [PATCH v4 09/16] net: dwmac-starfive: " Jan Petrous via B4 Relay
2024-10-29 12:03   ` Andrew Lunn
2024-10-28 20:24 ` [PATCH v4 10/16] net: macb: " Jan Petrous via B4 Relay
2024-10-29 12:04   ` Andrew Lunn
2024-10-28 20:24 ` [PATCH v4 11/16] net: xgene_enet: " Jan Petrous via B4 Relay
2024-10-29 12:04   ` Andrew Lunn
2024-10-28 20:24 ` [PATCH v4 12/16] net: dwmac-sti: " Jan Petrous via B4 Relay
2024-10-29 12:06   ` Andrew Lunn
2024-10-28 20:24 ` [PATCH v4 13/16] dt-bindings: net: Add DT bindings for DWMAC on NXP S32G/R SoCs Jan Petrous via B4 Relay
2024-10-29  7:12   ` Krzysztof Kozlowski
2024-10-31 14:29     ` Jan Petrous
2024-10-31 15:00       ` Andrew Lunn
2024-10-31 15:43       ` Krzysztof Kozlowski
2024-10-28 20:24 ` [PATCH v4 14/16] net: stmmac: dwmac-s32: add basic NXP S32G/S32R glue driver Jan Petrous via B4 Relay
2024-10-29  7:13   ` Krzysztof Kozlowski
2024-10-31 14:43     ` Jan Petrous
2024-10-31 15:44       ` Krzysztof Kozlowski
2024-10-31 17:16         ` Jan Petrous
2024-10-31 17:24           ` Jan Petrous
2024-11-01 15:40             ` Krzysztof Kozlowski
2024-11-19 14:51               ` Jan Petrous
2024-10-31 17:53           ` Krzysztof Kozlowski
2024-10-29 12:15   ` Andrew Lunn [this message]
2024-11-11 14:08     ` Jan Petrous
2024-10-28 20:24 ` [PATCH v4 15/16] MAINTAINERS: Add Jan Petrous as the NXP S32G/R DWMAC driver maintainer Jan Petrous via B4 Relay
2024-10-29 12:16   ` Andrew Lunn
2024-10-28 20:24 ` [PATCH v4 16/16] net: stmmac: dwmac-s32: Read PTP clock rate when ready Jan Petrous via B4 Relay
2024-10-29 12:18   ` Andrew Lunn
2024-11-17 15:39     ` Jan Petrous

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=c902dc2a-9b2a-44a0-be1d-88fb150f4f17@lunn.ch \
    --to=andrew@lunn.ch \
    --cc=alexandre.torgue@foss.st.com \
    --cc=claudiu.beznea@tuxon.dev \
    --cc=conor+dt@kernel.org \
    --cc=davem@davemloft.net \
    --cc=devicetree@vger.kernel.org \
    --cc=edumazet@google.com \
    --cc=festevam@gmail.com \
    --cc=hkallweit1@gmail.com \
    --cc=imx@lists.linux.dev \
    --cc=iyappan@os.amperecomputing.com \
    --cc=jan.petrous@oss.nxp.com \
    --cc=joabreu@synopsys.com \
    --cc=kernel@esmil.dk \
    --cc=kernel@pengutronix.de \
    --cc=keyur@os.amperecomputing.com \
    --cc=krzk+dt@kernel.org \
    --cc=kuba@kernel.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-arm-msm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-stm32@st-md-mailman.stormreply.com \
    --cc=linux@armlinux.org.uk \
    --cc=mcoquelin.stm32@gmail.com \
    --cc=minda.chen@starfivetech.com \
    --cc=netdev@vger.kernel.org \
    --cc=nicolas.ferre@microchip.com \
    --cc=pabeni@redhat.com \
    --cc=peppe.cavallaro@st.com \
    --cc=quan@os.amperecomputing.com \
    --cc=richardcochran@gmail.com \
    --cc=robh@kernel.org \
    --cc=s.hauer@pengutronix.de \
    --cc=s32@nxp.com \
    --cc=shawnguo@kernel.org \
    --cc=vkoul@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox