Re: [PATCH v2 net-next 0/3] net: enetc: add port MDIO support for both i.MX94 and i.MX95

[Andrew Lunn <andrew@lunn.ch>]

> There is an Integrated Endpoint Register Block (IERB) module inside the
> NETC, it is used to set some pre-initialization for ENETC, switch and other
> functions. And this module is controlled by the host OS. In IERB, each
> ENETC has a corresponding LaBCR register, where
> LaBCR[MDIO_PHYAD_PRTAD] represents the address of the external PHY
> of that ENETC. If the PHY address accessed by the ENETC using port MDIO
> does not match LaBCR[MDIO_PHYAD_PRTAD], the MDIO access is invalid.
> Therefore, the Guest OS cannot access the PHY of other ENETCs using
> port MDIO.
> 
> What patch 1 and patch 2 do is configure LaBCR[MDIO_PHYAD_PRTAD] for
> each ENETC.

And this is done by the host OS. The guest OS has no access to this
register?

The host OS is using DT, following the phandle from the MAC to the PHY
to find the address of the PHY. So is the MAC and PHY also probed in
the host OS, because it is listed in DT? When the guest OS is
provisioned, is the host driver of the MAC and PHY unbound? A DT blob
for the guest is constructed from the host DT blob, taking out all the
parts the guest is not allowed to access?

> > I assume there is a hypervisor doing this enforcement? But if there is
> > a hypervisor doing this enforcement, why does the ENETC port MDIO need
> > programming? The hypervisor will block it from accessing anything it
> > should not be able to access. A normal MDIO bus scan will find just
> > the devices it is allowed to access.
> > 
> > I also think the architecture is wrong. Why is the MAC driver messing
> > around with the ENETC Port MDIO hardware? I assume the ENETC port MDIO
> 
> The MAC driver (enetc) only simply changes the base address of its port
> MDIO registers, see patch 3:
> 
> mdio_priv->mdio_base = ENETC4_EMDIO_BASE;

And i assume the hypervisor like block is limiting the guest to only
access this MDIO bus? But why do this here? The DT blob passed to the
guest should have the correct base address, so when it probes the MDIO
bus it should already have the correct address?

	Andrew