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From: "Arnd Bergmann" <arnd@arndb.de>
To: "Khristine Andreea Barbulescu"
	<khristineandreea.barbulescu@oss.nxp.com>,
	"Krzysztof Kozlowski" <krzk@kernel.org>,
	"Ghennadi Procopciuc" <ghennadi.procopciuc@oss.nxp.com>
Cc: "Linus Walleij" <linus.walleij@linaro.org>,
	"Bartosz Golaszewski" <brgl@bgdev.pl>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Chester Lin" <chester62515@gmail.com>,
	"Matthias Brugger" <mbrugger@suse.com>,
	"Ghennadi Procopciuc" <ghennadi.procopciuc@nxp.com>,
	"Larisa Grigore" <larisa.grigore@nxp.com>,
	"Lee Jones" <lee@kernel.org>, "Shawn Guo" <shawnguo@kernel.org>,
	"Sascha Hauer" <s.hauer@pengutronix.de>,
	"Fabio Estevam" <festevam@gmail.com>,
	"Aisheng Dong" <aisheng.dong@nxp.com>,
	"Jacky Bai" <ping.bai@nxp.com>,
	"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	"Alberto Ruiz" <aruizrui@redhat.com>,
	"Christophe Lizzi" <clizzi@redhat.com>,
	devicetree@vger.kernel.org,
	"Enric Balletbo" <eballetb@redhat.com>,
	"Eric Chanudet" <echanude@redhat.com>,
	imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
	"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
	linux-kernel@vger.kernel.org, "NXP S32 Linux Team" <s32@nxp.com>,
	"Pengutronix Kernel Team" <kernel@pengutronix.de>,
	"Vincent Guittot" <vincent.guittot@linaro.org>,
	"Rob Herring" <robh@kernel.org>
Subject: Re: [PATCH v8 01/10] dt-bindings: mfd: add support for the NXP SIUL2 module
Date: Tue, 31 Mar 2026 12:11:40 +0200	[thread overview]
Message-ID: <e1c341d6-e60d-4200-a094-48667e8ccd5c@app.fastmail.com> (raw)
In-Reply-To: <4c46909d-641b-4389-bc4a-29394cb1d46d@oss.nxp.com>

On Tue, Mar 31, 2026, at 09:48, Khristine Andreea Barbulescu wrote:
> 
> With the current layout, the SIUL2 node itself now contains the two
> MMIO ranges directly, while the remaining child node is only the
> pinctrl/GPIO function.

The thread started by saying this is an MFD "It can export information
about the SoC, configure the pinmux&pinconf for pins and it is also
a GPIO controller with interrupt capability." Having a combined
pinctrl/gpio/irqchip driver is normal, but can you clarify what
you plan to do with the "information about the SoC" part?

Was this a "soc_device" driver, or something else? Have you
concluded now that this is not going to be needed at all?
In that case, I guess having a monolithic driver is
indeed simpler than an MFD.

What I wonder about then is whether the binding needs to be changed
at all. With the current nxp,s32g2-siul2-pinctrl.yaml binding
and pinctrl-s32g2.c implementation, you seem to have a monolithic
device already, though missing the gpio functionality. Rather
than completely replacing this, I assume the easiest way then
would be to add the PGPD registers into this device node, right?

It is still a bit weird to list the individual register areas
inside of the larger device here, but that still seems better
than an incompatible binding change.

    Arnd

  reply	other threads:[~2026-03-31 10:12 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-20 11:59 [PATCH v8 00/10] gpio: siul2-s32g2: add initial GPIO driver Khristine Andreea Barbulescu
2026-01-20 11:59 ` [PATCH v8 01/10] dt-bindings: mfd: add support for the NXP SIUL2 module Khristine Andreea Barbulescu
2026-01-21  2:19   ` Rob Herring
2026-02-19 11:36     ` Khristine Andreea Barbulescu
2026-02-20 10:16       ` Krzysztof Kozlowski
2026-02-20 14:36         ` Khristine Andreea Barbulescu
2026-02-20 14:41           ` Krzysztof Kozlowski
2026-02-23 11:51             ` Khristine Andreea Barbulescu
2026-02-23 13:14               ` Krzysztof Kozlowski
2026-02-25  9:40                 ` Ghennadi Procopciuc
2026-03-03 13:28                   ` Ghennadi Procopciuc
2026-03-13 17:10                   ` Krzysztof Kozlowski
2026-03-14  7:31                     ` Arnd Bergmann
2026-03-23  7:57                       ` Khristine Andreea Barbulescu
2026-03-23  8:07                         ` Krzysztof Kozlowski
2026-03-31  7:48                           ` Khristine Andreea Barbulescu
2026-03-31 10:11                             ` Arnd Bergmann [this message]
2026-03-31 13:43                               ` Khristine Andreea Barbulescu
2026-03-31 14:08                                 ` Arnd Bergmann
2026-03-23 15:33                         ` Arnd Bergmann
2026-02-20 10:18       ` Krzysztof Kozlowski
2026-02-20 14:14         ` Khristine Andreea Barbulescu
2026-01-20 11:59 ` [PATCH v8 02/10] mfd: nxp-siul2: add support for NXP SIUL2 Khristine Andreea Barbulescu
2026-01-22 18:52   ` Sander Vanheule
2026-01-20 11:59 ` [PATCH v8 03/10] arm64: dts: s32g: change pinctrl node into the new mfd node Khristine Andreea Barbulescu
2026-01-27  9:13   ` Linus Walleij
2026-01-20 11:59 ` [PATCH v8 04/10] pinctrl: s32cc: use dev_err_probe() and improve error messages Khristine Andreea Barbulescu
2026-01-20 12:04   ` Bartosz Golaszewski
2026-01-20 11:59 ` [PATCH v8 05/10] pinctrl: s32cc: change to "devm_pinctrl_register_and_init" Khristine Andreea Barbulescu
2026-01-20 12:04   ` Bartosz Golaszewski
2026-01-20 11:59 ` [PATCH v8 06/10] pinctrl: s32g2: change the driver to also be probed as an MFD cell Khristine Andreea Barbulescu
2026-01-20 12:08   ` Bartosz Golaszewski
2026-01-23 13:57   ` Vincent Guittot
2026-01-20 11:59 ` [PATCH v8 07/10] pinctrl: s32cc: skip syscon child nodes when parsing funcs and groups Khristine Andreea Barbulescu
2026-01-20 12:16   ` Bartosz Golaszewski
2026-01-27  9:14   ` Linus Walleij
2026-01-20 11:59 ` [PATCH v8 08/10] pinctrl: s32cc: implement GPIO functionality Khristine Andreea Barbulescu
2026-01-23 13:56   ` Vincent Guittot
2026-01-20 11:59 ` [PATCH v8 09/10] MAINTAINERS: add MAINTAINER for NXP SIUL2 MFD driver Khristine Andreea Barbulescu
2026-01-27  9:17   ` Linus Walleij
2026-01-20 11:59 ` [PATCH v8 10/10] pinctrl: s32cc: set num_custom_params to 0 Khristine Andreea Barbulescu
2026-01-20 12:16   ` Bartosz Golaszewski
2026-01-20 13:45     ` Daniel Baluta
2026-01-20 19:49 ` [PATCH v8 00/10] gpio: siul2-s32g2: add initial GPIO driver Rob Herring

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