From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [185.203.201.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 74C0D20B211 for ; Thu, 20 Feb 2025 15:45:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.203.201.7 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740066357; cv=none; b=Z65a4rQkkeEW7IrkpgQSxt0mh9fe+Y7keqPNMl0djc/mlSPopUECWVTl37jZMp8jN1xiMkwuBQTswuCBbqDRWxO68dnXxFGgrUMQPzUTNawkaWdTgdRznHQjsGKRO+ZTIPxQG023uaT5gup1I6IhoIAjTi8ilpyw5ejnWXvaVV0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740066357; c=relaxed/simple; bh=J6tNrRWmwDeSw4FPqfaA9voFmMDbjtLKvyBcPxfz8iQ=; h=Message-ID:Subject:From:To:Cc:Date:In-Reply-To:References: Content-Type:MIME-Version; b=tAJ9g4Tam0GGvGFdmyW9dPe8gl8BJx4/LndEuzotOlZCaOROJLJTfczu5mNrupkWQrIdSbxH5ebIPL3h/JEfTNQj4CkA8/uqaSJ/PoMlGSR+XGjtBGop3ZpZg69qsx2yHzvrTsKRepgtjagMEtE9C+FDxnU3Tzrw+nykBDaVVss= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de; spf=pass smtp.mailfrom=pengutronix.de; arc=none smtp.client-ip=185.203.201.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pengutronix.de Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.whiteo.stw.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1tl8kB-0003Py-2B; Thu, 20 Feb 2025 16:45:43 +0100 Received: from lupine.office.stw.pengutronix.de ([2a0a:edc0:0:900:1d::4e] helo=lupine) by drehscheibe.grey.stw.pengutronix.de with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1tl8kA-001xUj-2g; Thu, 20 Feb 2025 16:45:42 +0100 Received: from pza by lupine with local (Exim 4.96) (envelope-from ) id 1tl8kA-000Cm6-2O; Thu, 20 Feb 2025 16:45:42 +0100 Message-ID: Subject: Re: [PATCH v2 2/8] dt-bindings: dsp: fsl,dsp: Add resets property From: Philipp Zabel To: Daniel Baluta , robh@kernel.org, shawnguo@kernel.org Cc: krzk+dt@kernel.org, conor+dt@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, mathieu.poirier@linaro.org, shengjiu.wang@nxp.com, Frank.Li@nxp.com, peng.fan@nxp.com, laurentiu.mihalcea@nxp.com, iuliana.prodan@nxp.com Date: Thu, 20 Feb 2025 16:45:42 +0100 In-Reply-To: <20250219192102.423850-3-daniel.baluta@nxp.com> References: <20250219192102.423850-1-daniel.baluta@nxp.com> <20250219192102.423850-3-daniel.baluta@nxp.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.46.4-2 Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: p.zabel@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: imx@lists.linux.dev On Mi, 2025-02-19 at 21:20 +0200, Daniel Baluta wrote: > On i.MX8MP we introduced support for using a reset controller > to control DSP operation. >=20 > This patch adds reset property which is required for i.MX8MP. >=20 > Signed-off-by: Daniel Baluta > --- > .../devicetree/bindings/dsp/fsl,dsp.yaml | 19 ++++++++++++++++++- > 1 file changed, 18 insertions(+), 1 deletion(-) >=20 > diff --git a/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml b/Documen= tation/devicetree/bindings/dsp/fsl,dsp.yaml > index ab93ffd3d2e5..923e7f079f1b 100644 > --- a/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml > +++ b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml > @@ -82,6 +82,13 @@ properties: > description: > Phandle to syscon block which provide access for processor enablem= ent > =20 > + resets: > + description: > + A pair consisting of phandle to audio-blk-control and an index ref= erencing > + the DSP Run/Stall bit in audiomix registers. > + See include/dt-bindings/reset/imx8mp-reset-audiomix.h for each ind= ex meaning. > + maxItems: 1 This is going to be confusing when there is an actual (undocumented?) DSP core reset that is not described in the device tree bindings, see patch 8. To me this looks like a bit of a gray zone, as I don't know how the hardware actually works, but if you wouldn't call the Run/Stall bit a reset, it probably shouldn't be described as such in the device tree bindings. I'm not sure. Should both core and runstall reset be described in the device tree? Or only the core reset, or neither? Either way we should try not to lie about the hardware here. regards Philipp