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([2a02:908:1256:79a0:f4ab:6c74:114:840d]) by smtp.gmail.com with ESMTPSA id e38-20020a5d5966000000b002252884cc91sm14153453wri.43.2022.10.19.09.43.59 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 19 Oct 2022 09:43:59 -0700 (PDT) Message-ID: <0579fb14-17c3-37c6-6b9f-3a0eef0f6f77@gmail.com> Date: Wed, 19 Oct 2022 18:43:58 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.11.0 Content-Language: en-US To: Somalapuram Amaranath , dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, nouveau@lists.freedesktop.org References: <20221019152736.654451-1-Amaranath.Somalapuram@amd.com> <20221019152736.654451-2-Amaranath.Somalapuram@amd.com> From: =?UTF-8?Q?Christian_K=c3=b6nig?= In-Reply-To: <20221019152736.654451-2-Amaranath.Somalapuram@amd.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Intel-gfx] =?utf-8?b?W1BBVENIIDIvNl0gZHJtL2FtZDogZml44oCZcyBv?= =?utf-8?q?n_ttm=5Fresource_rework_to_use_size=5Ft_type?= X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alexander.deucher@amd.com, christian.koenig@amd.com, arunpravin.paneerselvam@amd.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Am 19.10.22 um 17:27 schrieb Somalapuram Amaranath: > Fix the ttm_resource from num_pages to size_t size. > > Signed-off-by: Somalapuram Amaranath > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c | 2 +- > drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 3 ++- > drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h | 4 ++-- > drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h | 2 +- > drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 6 +++--- > drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c | 8 ++++---- > 6 files changed, 13 insertions(+), 12 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c > index 1f3302aebeff..44367f03316f 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c > @@ -144,7 +144,7 @@ static int amdgpu_gtt_mgr_new(struct ttm_resource_manager *man, > node->base.start = node->mm_nodes[0].start; > } else { > node->mm_nodes[0].start = 0; > - node->mm_nodes[0].size = node->base.num_pages; > + node->mm_nodes[0].size = PFN_UP(node->base.size); > node->base.start = AMDGPU_BO_INVALID_OFFSET; > } > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c > index 2e8f6cd7a729..e51f80bb1d07 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c > @@ -542,6 +542,7 @@ int amdgpu_bo_create(struct amdgpu_device *adev, > /* GWS and OA don't need any alignment. */ > page_align = bp->byte_align; > size <<= PAGE_SHIFT; > + > } else if (bp->domain & AMDGPU_GEM_DOMAIN_GDS) { > /* Both size and alignment must be a multiple of 4. */ > page_align = ALIGN(bp->byte_align, 4); > @@ -776,7 +777,7 @@ int amdgpu_bo_kmap(struct amdgpu_bo *bo, void **ptr) > return 0; > } > > - r = ttm_bo_kmap(&bo->tbo, 0, bo->tbo.resource->num_pages, &bo->kmap); > + r = ttm_bo_kmap(&bo->tbo, 0, PFN_UP(bo->tbo.resource->size), &bo->kmap); Here bo->tbo.base.size would make more sense, but apart from that the patch looks good to me. Regards, Christian. > if (r) > return r; > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h > index 6546552e596c..5c4f93ee0c57 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h > @@ -62,7 +62,7 @@ static inline void amdgpu_res_first(struct ttm_resource *res, > if (!res) > goto fallback; > > - BUG_ON(start + size > res->num_pages << PAGE_SHIFT); > + BUG_ON(start + size > res->size); > > cur->mem_type = res->mem_type; > > @@ -110,7 +110,7 @@ static inline void amdgpu_res_first(struct ttm_resource *res, > cur->size = size; > cur->remaining = size; > cur->node = NULL; > - WARN_ON(res && start + size > res->num_pages << PAGE_SHIFT); > + WARN_ON(res && start + size > res->size); > return; > } > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h > index 5e6ddc7e101c..677ad2016976 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h > @@ -127,7 +127,7 @@ TRACE_EVENT(amdgpu_bo_create, > > TP_fast_assign( > __entry->bo = bo; > - __entry->pages = bo->tbo.resource->num_pages; > + __entry->pages = PFN_UP(bo->tbo.resource->size); > __entry->type = bo->tbo.resource->mem_type; > __entry->prefer = bo->preferred_domains; > __entry->allow = bo->allowed_domains; > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c > index dc262d2c2925..36066965346f 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c > @@ -381,7 +381,7 @@ static int amdgpu_move_blit(struct ttm_buffer_object *bo, > dst.offset = 0; > > r = amdgpu_ttm_copy_mem_to_mem(adev, &src, &dst, > - new_mem->num_pages << PAGE_SHIFT, > + new_mem->size, > amdgpu_bo_encrypted(abo), > bo->base.resv, &fence); > if (r) > @@ -424,7 +424,7 @@ static int amdgpu_move_blit(struct ttm_buffer_object *bo, > static bool amdgpu_mem_visible(struct amdgpu_device *adev, > struct ttm_resource *mem) > { > - u64 mem_size = (u64)mem->num_pages << PAGE_SHIFT; > + u64 mem_size = (u64)mem->size; > struct amdgpu_res_cursor cursor; > u64 end; > > @@ -568,7 +568,7 @@ static int amdgpu_ttm_io_mem_reserve(struct ttm_device *bdev, > struct ttm_resource *mem) > { > struct amdgpu_device *adev = amdgpu_ttm_adev(bdev); > - size_t bus_size = (size_t)mem->num_pages << PAGE_SHIFT; > + size_t bus_size = (size_t)mem->size; > > switch (mem->mem_type) { > case TTM_PL_SYSTEM: > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c > index 73a517bcf5c1..18c1a173d187 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c > @@ -439,7 +439,7 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man, > /* Allocate blocks in desired range */ > vres->flags |= DRM_BUDDY_RANGE_ALLOCATION; > > - remaining_size = (u64)vres->base.num_pages << PAGE_SHIFT; > + remaining_size = (u64)vres->base.size; > > mutex_lock(&mgr->lock); > while (remaining_size) { > @@ -498,7 +498,7 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man, > LIST_HEAD(temp); > > trim_list = &vres->blocks; > - original_size = (u64)vres->base.num_pages << PAGE_SHIFT; > + original_size = (u64)vres->base.size; > > /* > * If size value is rounded up to min_block_size, trim the last > @@ -533,8 +533,8 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man, > amdgpu_vram_mgr_block_size(block); > start >>= PAGE_SHIFT; > > - if (start > vres->base.num_pages) > - start -= vres->base.num_pages; > + if (start > PFN_UP(vres->base.size)) > + start -= PFN_UP(vres->base.size); > else > start = 0; > vres->base.start = max(vres->base.start, start);