From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Souza, Jose" Subject: Re: [PATCH v2 08/11] drm/i915/psr: Check if source supports sink specific SU granularity Date: Mon, 3 Dec 2018 23:18:08 +0000 Message-ID: <05aa075e325b95bc74a8f74e78073ddbb94e8a90.camel@intel.com> References: <20181130022525.25676-1-jose.souza@intel.com> <20181130022525.25676-8-jose.souza@intel.com> <6eb613d82dac84f3169f067bb98ed614e2d37850.camel@intel.com> <112f0ce4cbe19f90a292849c3f16a0cc68a973ae.camel@intel.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1336833444==" Return-path: In-Reply-To: Content-Language: en-US List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: "intel-gfx@lists.freedesktop.org" , "Pandiyan, Dhinakaran" Cc: "dri-devel@lists.freedesktop.org" , "Vivi, Rodrigo" List-Id: intel-gfx@lists.freedesktop.org --===============1336833444== Content-Language: en-US Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="=-QpTnKWBtMgcEP/rFh2Hk" --=-QpTnKWBtMgcEP/rFh2Hk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Mon, 2018-12-03 at 15:12 -0800, Pandiyan, Dhinakaran wrote: > On Mon, 2018-12-03 at 14:45 -0800, Souza, Jose wrote: > > On Mon, 2018-12-03 at 12:59 -0800, Dhinakaran Pandiyan wrote: > > > On Thu, 2018-11-29 at 18:25 -0800, Jos=C3=A9 Roberto de Souza wrote: > > > > According to eDP spec, sink can required specific selective > > > > update > > > > granularity that source must comply. > > > > Here caching the value if required and checking if source > > > > supports > > > > it. > > > >=20 > > > > Cc: Rodrigo Vivi > > > > Cc: Dhinakaran Pandiyan > > > > Signed-off-by: Jos=C3=A9 Roberto de Souza > > > > --- > > > > drivers/gpu/drm/i915/i915_drv.h | 1 + > > > > drivers/gpu/drm/i915/intel_psr.c | 21 ++++++++++++++++++++- > > > > 2 files changed, 21 insertions(+), 1 deletion(-) > > > >=20 > > > > diff --git a/drivers/gpu/drm/i915/i915_drv.h > > > > b/drivers/gpu/drm/i915/i915_drv.h > > > > index 43ac6873a2bb..0727d8051dd3 100644 > > > > --- a/drivers/gpu/drm/i915/i915_drv.h > > > > +++ b/drivers/gpu/drm/i915/i915_drv.h > > > > @@ -507,6 +507,7 @@ struct i915_psr { > > > > ktime_t last_exit; > > > > bool sink_not_reliable; > > > > bool irq_aux_error; > > > > + u16 su_x_granularity; > > > > }; > > > > =20 > > > > enum intel_pch { > > > > diff --git a/drivers/gpu/drm/i915/intel_psr.c > > > > b/drivers/gpu/drm/i915/intel_psr.c > > > > index 282ff1bc68a7..f9eccaac850a 100644 > > > > --- a/drivers/gpu/drm/i915/intel_psr.c > > > > +++ b/drivers/gpu/drm/i915/intel_psr.c > > > > @@ -261,6 +261,23 @@ static u8 > > > > intel_dp_get_sink_sync_latency(struct > > > > intel_dp *intel_dp) > > > > return val; > > > > } > > > > =20 > > > > +static u16 intel_dp_get_su_x_granulartiy(struct intel_dp > > > > *intel_dp) > > > > +{ > > > > + u16 val; > > > > + ssize_t r; > > > > + > > > > + if (!(intel_dp->psr_dpcd[1] & > > > > DP_PSR2_SU_GRANULARITY_REQUIRED)) > > > > { > > > > + /* Returning the default X granularity */ > > > > + return 4; > > > > + } > > >=20 > > > nit: Braces not needed, you could move the comment a line above. > > >=20 > > > A value of 0 in this DPCD indicates there is no granularity > > > requirement, why assume 4?=20 > >=20 > > Like you said bellow, 4 is the default granularity if this is not > > set. > >=20 > The spec states 0 means no granularity requirements, return 1 here? A value of 0 indicates that no X-coordinate granularity requirement exists other than the standard restrictions, wherein the: Starting X-coordinate must be evenly divisible by 16 Rectangle width must be evenly divisible by 4 >=20 > > > > + > > > > + r =3D drm_dp_dpcd_read(&intel_dp->aux, > > > > DP_PSR2_SU_X_GRANULARITY, > > > > &val, 2); > > > > + if (r !=3D 2) > > > > + DRM_WARN("Unable to read > > > > DP_PSR2_SU_X_GRANULARITY\n"); > > >=20 > > > Please change this to the warning level that we use elsewhere for > > > aux > > > failures. > >=20 > > So changing to DRM_DEBUG_KMS() > >=20 > > > If I'm reading the spec correctly, a value of 0 in this DPCD > > > means > > > the > > > sink expects a granularity of 4, so returning 0 would be > > > incorrect. > > >=20 > > > > + > > > > + return val; > > >=20 > > > Assume the default value of 4 if aux read fails (after printing > > > an > > > error) > > >=20 > >=20 > > Done > >=20 > >=20 > > > > +} > > > > + > > > > void intel_psr_init_dpcd(struct intel_dp *intel_dp) > > > > { > > > > struct drm_i915_private *dev_priv =3D > > > > @@ -315,6 +332,8 @@ void intel_psr_init_dpcd(struct intel_dp > > > > *intel_dp) > > > > if (dev_priv->psr.sink_psr2_support) { > > > > dev_priv->psr.colorimetry_support =3D > > > > intel_dp_get_colorimetry_status > > > > (intel_d > > > > p); > > > > + dev_priv->psr.su_x_granularity =3D > > > > + intel_dp_get_su_x_granulartiy(i > > > > ntel_dp) > > > > ; > > > > } > > > > } > > > > } > > > > @@ -546,7 +565,7 @@ static bool intel_psr2_config_valid(struct > > > > intel_dp *intel_dp, > > > > * at each 4 lines with height of 4 lines, what eDP > > > > states > > > > * that sink should support. > > > > */ > > > > - if (crtc_hdisplay % 4) { > > > > + if (crtc_hdisplay % dev_priv->psr.su_x_granularity) { > > > > DRM_DEBUG_KMS("PSR2 not enabled, default SU > > > > granularity > > > > not match\n"); > > > > return false; > > > > } --=-QpTnKWBtMgcEP/rFh2Hk Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNATURE----- iQEzBAABCAAdFiEEVNG051EijGa0MiaQVenbO/mOWkkFAlwFua4ACgkQVenbO/mO WkmNTggAjSDrJWvePjhVltc6TUWAQ0YHBY3kE/WIGfaPPjknaY2joyGAQLX2T5ON pkOTZxcZY9DXNlJV6jq+P+PWeqW/nZmt9FWEbHSWxtFevUWXLTqa7mc6dL/FbDbL FNxlEdXrZBA+Cdq0M+3kpBsdxdOdtkYeI1m8xbnPmYDOtS7wgNJUQLg1zCLoKpsr sZrdpnqZ/wmAeVMpe0Ve3s0Ci3K+HIoVvsRU0qCM9t9asywZKUU/0MUAtjKkCC0a AHRcRvZOUJigg5bGJRDGQtvmrykknkOzaG+5OYTEaaUz0wKH0/rSFd8W9jt9sGZN 4kgJIdwdCs3xGYkG92ypiCDAPz1ilA== =p7HU -----END PGP SIGNATURE----- --=-QpTnKWBtMgcEP/rFh2Hk-- --===============1336833444== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Content-Disposition: inline X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KSW50ZWwtZ2Z4 IG1haWxpbmcgbGlzdApJbnRlbC1nZnhAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlz dHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vaW50ZWwtZ2Z4Cg== --===============1336833444==--