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X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Oct 2025 08:43:32.5744 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: AnXmz8jMAFkwgOyzHM3GGSSDPs5DO2wyHVNhkT7O7T6jZY3Xrr5pYnMvXGEbzw4b7lnbBn+P2DATgeqfaT15ng== X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV3PR11MB8529 X-OriginatorOrg: intel.com X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On 15-10-2025 09:38, Suraj Kandpal wrote: > Hook up the LT Phy enable and disable sequences using encoder-> > enable/disable_clock and reusing the TBT enable disable sequence from > cx0 PHY since it remains the same. > > Signed-off-by: Suraj Kandpal > --- Reviewed-by: Arun R Murthy Thanks and Regards, Arun R Murthy -------------------- > drivers/gpu/drm/i915/display/intel_cx0_phy.c | 7 ++++--- > drivers/gpu/drm/i915/display/intel_cx0_phy.h | 3 +++ > drivers/gpu/drm/i915/display/intel_ddi.c | 7 ++++++- > drivers/gpu/drm/i915/display/intel_lt_phy.c | 21 ++++++++++++++++++++ > drivers/gpu/drm/i915/display/intel_lt_phy.h | 3 +++ > 5 files changed, 37 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c > index 914b215d8bd4..986da034d4de 100644 > --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c > +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c > @@ -18,6 +18,7 @@ > #include "intel_display_types.h" > #include "intel_dp.h" > #include "intel_hdmi.h" > +#include "intel_lt_phy.h" > #include "intel_panel.h" > #include "intel_psr.h" > #include "intel_snps_hdmi_pll.h" > @@ -3155,8 +3156,8 @@ static int intel_mtl_tbt_clock_select(struct intel_display *display, > } > } > > -static void intel_mtl_tbt_pll_enable(struct intel_encoder *encoder, > - const struct intel_crtc_state *crtc_state) > +void intel_mtl_tbt_pll_enable(struct intel_encoder *encoder, > + const struct intel_crtc_state *crtc_state) > { > struct intel_display *display = to_intel_display(encoder); > enum phy phy = intel_encoder_to_phy(encoder); > @@ -3340,7 +3341,7 @@ static bool intel_cx0_pll_is_enabled(struct intel_encoder *encoder) > intel_cx0_get_pclk_pll_request(lane); > } > > -static void intel_mtl_tbt_pll_disable(struct intel_encoder *encoder) > +void intel_mtl_tbt_pll_disable(struct intel_encoder *encoder) > { > struct intel_display *display = to_intel_display(encoder); > enum phy phy = intel_encoder_to_phy(encoder); > diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.h b/drivers/gpu/drm/i915/display/intel_cx0_phy.h > index f0f0efa2d48b..a37827482a32 100644 > --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.h > +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.h > @@ -64,5 +64,8 @@ int intel_mtl_tbt_calc_port_clock(struct intel_encoder *encoder); > void intel_cx0_pll_power_save_wa(struct intel_display *display); > void intel_lnl_mac_transmit_lfps(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state); > +void intel_mtl_tbt_pll_enable(struct intel_encoder *encoder, > + const struct intel_crtc_state *crtc_state); > +void intel_mtl_tbt_pll_disable(struct intel_encoder *encoder); > > #endif /* __INTEL_CX0_PHY_H__ */ > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c > index c09aa759f4d4..6fcfdd0b0103 100644 > --- a/drivers/gpu/drm/i915/display/intel_ddi.c > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c > @@ -72,6 +72,7 @@ > #include "intel_hotplug.h" > #include "intel_hti.h" > #include "intel_lspcon.h" > +#include "intel_lt_phy.h" > #include "intel_mg_phy_regs.h" > #include "intel_modeset_lock.h" > #include "intel_panel.h" > @@ -5224,7 +5225,11 @@ void intel_ddi_init(struct intel_display *display, > encoder->cloneable = 0; > encoder->pipe_mask = ~0; > > - if (DISPLAY_VER(display) >= 14) { > + if (HAS_LT_PHY(display)) { > + encoder->enable_clock = intel_xe3plpd_pll_enable; > + encoder->disable_clock = intel_xe3plpd_pll_disable; > + encoder->port_pll_type = intel_mtl_port_pll_type; > + } else if (DISPLAY_VER(display) >= 14) { > encoder->enable_clock = intel_mtl_pll_enable; > encoder->disable_clock = intel_mtl_pll_disable; > encoder->port_pll_type = intel_mtl_port_pll_type; > diff --git a/drivers/gpu/drm/i915/display/intel_lt_phy.c b/drivers/gpu/drm/i915/display/intel_lt_phy.c > index 747cce4a484a..d458909b5f12 100644 > --- a/drivers/gpu/drm/i915/display/intel_lt_phy.c > +++ b/drivers/gpu/drm/i915/display/intel_lt_phy.c > @@ -1692,3 +1692,24 @@ void intel_lt_phy_pll_disable(struct intel_encoder *encoder) > > intel_lt_phy_transaction_end(encoder, wakeref); > } > + > +void intel_xe3plpd_pll_enable(struct intel_encoder *encoder, > + const struct intel_crtc_state *crtc_state) > +{ > + struct intel_digital_port *dig_port = enc_to_dig_port(encoder); > + > + if (intel_tc_port_in_tbt_alt_mode(dig_port)) > + intel_mtl_tbt_pll_enable(encoder, crtc_state); > + else > + intel_lt_phy_pll_enable(encoder, crtc_state); > +} > + > +void intel_xe3plpd_pll_disable(struct intel_encoder *encoder) > +{ > + struct intel_digital_port *dig_port = enc_to_dig_port(encoder); > + > + if (intel_tc_port_in_tbt_alt_mode(dig_port)) > + intel_mtl_tbt_pll_disable(encoder); > + else > + intel_lt_phy_pll_disable(encoder); > +} > diff --git a/drivers/gpu/drm/i915/display/intel_lt_phy.h b/drivers/gpu/drm/i915/display/intel_lt_phy.h > index 499091e04e82..15d3d680871c 100644 > --- a/drivers/gpu/drm/i915/display/intel_lt_phy.h > +++ b/drivers/gpu/drm/i915/display/intel_lt_phy.h > @@ -20,6 +20,9 @@ intel_lt_phy_pll_calc_state(struct intel_crtc_state *crtc_state, > struct intel_encoder *encoder); > int intel_lt_phy_calc_port_clock(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state); > +void intel_xe3plpd_pll_enable(struct intel_encoder *encoder, > + const struct intel_crtc_state *crtc_state); > +void intel_xe3plpd_pll_disable(struct intel_encoder *encoder); > > #define HAS_LT_PHY(display) (DISPLAY_VER(display) >= 35) >