From: Sagar Arun Kamble <sagar.a.kamble@intel.com>
To: Michal Wajdeczko <michal.wajdeczko@intel.com>,
intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v13 03/21] drm/i915/guc: Add status checks to enable/disable_guc_interrupts
Date: Thu, 12 Oct 2017 11:20:49 +0530 [thread overview]
Message-ID: <0ba36524-dc7d-75d9-e0ce-5342e3eacb10@intel.com> (raw)
In-Reply-To: <op.y7x970j0xaggs7@mwajdecz-mobl1.ger.corp.intel.com>
On 10/11/2017 8:50 PM, Michal Wajdeczko wrote:
> On Wed, 11 Oct 2017 10:53:58 +0200, Sagar Arun Kamble
> <sagar.a.kamble@intel.com> wrote:
>
>> GuC interrupts are currently enabled by Logging and disabled in
>> different
>> scenarios. Make disabling check whether interrupts were already disabled
>> and similar for enable path. This will remove the state tracking for the
>> callers of these functions based on kernel parameters.
>>
>> Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
>> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
>> Cc: Michał Winiarski <michal.winiarski@intel.com>
>> Cc: Chris Wilson <chris@chris-wilson.co.uk>
>> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
>> ---
>> drivers/gpu/drm/i915/i915_irq.c | 16 ++++++++++------
>> 1 file changed, 10 insertions(+), 6 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_irq.c
>> b/drivers/gpu/drm/i915/i915_irq.c
>> index a3de408..6cf417c 100644
>> --- a/drivers/gpu/drm/i915/i915_irq.c
>> +++ b/drivers/gpu/drm/i915/i915_irq.c
>> @@ -455,18 +455,22 @@ void gen9_reset_guc_interrupts(struct
>> drm_i915_private *dev_priv)
>> void gen9_enable_guc_interrupts(struct drm_i915_private *dev_priv)
>> {
>> + if (READ_ONCE(dev_priv->guc.interrupts_enabled))
>
> Hmm, I don't like that functions from irq.c read and modify guc internal
> members directly. I would expect that functions here just do their job
> and any state is maintained by the helper function(s) in guc.c.
Sure will move to guc.c.
>
> Also note that this change will not help scenario where one client will
> try to disable irqs while other client still depends on them.
>
Will add refcounting then.
> Michal
>
>> + return;
>> +
>> spin_lock_irq(&dev_priv->irq_lock);
>> - if (!dev_priv->guc.interrupts_enabled) {
>> - WARN_ON_ONCE(I915_READ(gen6_pm_iir(dev_priv)) &
>> - dev_priv->pm_guc_events);
>> - dev_priv->guc.interrupts_enabled = true;
>> - gen6_enable_pm_irq(dev_priv, dev_priv->pm_guc_events);
>> - }
>> + WARN_ON_ONCE(I915_READ(gen6_pm_iir(dev_priv)) &
>> + dev_priv->pm_guc_events);
>> + dev_priv->guc.interrupts_enabled = true;
>> + gen6_enable_pm_irq(dev_priv, dev_priv->pm_guc_events);
>> spin_unlock_irq(&dev_priv->irq_lock);
>> }
>> void gen9_disable_guc_interrupts(struct drm_i915_private *dev_priv)
>> {
>> + if (!READ_ONCE(dev_priv->guc.interrupts_enabled))
>> + return;
>> +
>> spin_lock_irq(&dev_priv->irq_lock);
>> dev_priv->guc.interrupts_enabled = false;
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2017-10-12 5:51 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-11 8:53 [PATCH v13 00/21] drm/i915: GEM/GuC Suspend/Resume/Reset fixes and restructuring Sagar Arun Kamble
2017-10-11 8:53 ` [PATCH v13 01/21] drm/i915/guc: Add GuC submission initialization/enable state variables Sagar Arun Kamble
2017-10-11 8:53 ` [PATCH v13 02/21] drm/i915/guc: Sanitize module parameter guc_log_level Sagar Arun Kamble
2017-10-11 14:51 ` Michal Wajdeczko
2017-10-12 5:48 ` Sagar Arun Kamble
2017-10-11 8:53 ` [PATCH v13 03/21] drm/i915/guc: Add status checks to enable/disable_guc_interrupts Sagar Arun Kamble
2017-10-11 15:20 ` Michal Wajdeczko
2017-10-12 5:50 ` Sagar Arun Kamble [this message]
2017-10-12 6:17 ` Sagar Arun Kamble
2017-10-13 8:09 ` Sagar Arun Kamble
2017-10-11 8:53 ` [PATCH v13 04/21] drm/i915/guc: Remove enable_guc_submission dependency for invoking GuC log functions Sagar Arun Kamble
2017-10-11 15:40 ` Michal Wajdeczko
2017-10-12 5:58 ` Sagar Arun Kamble
2017-10-11 8:54 ` [PATCH v13 05/21] drm/i915/guc: Update enable_guc_loading check in intel_uc_fini_hw Sagar Arun Kamble
2017-10-11 8:54 ` [PATCH v13 06/21] drm/i915/guc: Pass intel_guc struct parameter to intel_guc_suspend/resume Sagar Arun Kamble
2017-10-11 15:50 ` Michal Wajdeczko
2017-10-12 6:18 ` Sagar Arun Kamble
2017-10-11 8:54 ` [PATCH v13 07/21] drm/i915: Create GEM runtime resume helper and handle GEM runtime suspend error Sagar Arun Kamble
2017-10-11 8:54 ` [PATCH v13 08/21] drm/i915/guc: Update GEM suspend/resume flows with GuC suspend/resume functions Sagar Arun Kamble
2017-10-11 8:54 ` [PATCH v13 09/21] drm/i915/uc: Create uC suspend and resume functions Sagar Arun Kamble
2017-10-11 15:57 ` Michal Wajdeczko
2017-10-12 6:25 ` Sagar Arun Kamble
2017-10-11 8:54 ` [PATCH v13 10/21] drm/i915/guc: Update uC suspend/resume function separating Host/GuC tasks Sagar Arun Kamble
2017-10-11 16:19 ` Michal Wajdeczko
2017-10-12 6:38 ` Sagar Arun Kamble
2017-10-11 8:54 ` [PATCH v13 11/21] drm/i915/guc: Remove GuC submission disable from i915_driver_unload Sagar Arun Kamble
2017-10-11 8:54 ` [PATCH v13 12/21] drm/i915/guc: Fix GuC related state cleanup in unload path Sagar Arun Kamble
2017-10-11 8:54 ` [PATCH v13 13/21] drm/i915/uc: Support resume from sleep w/ and w/o GuC/HuC reload Sagar Arun Kamble
2017-10-11 17:06 ` Michal Wajdeczko
2017-10-12 6:48 ` Sagar Arun Kamble
2017-10-11 8:54 ` [PATCH v13 14/21] drm/i915/uc: Update GEM runtime resume with need for reload of GuC/HuC Sagar Arun Kamble
2017-10-11 17:19 ` Michal Wajdeczko
2017-10-12 6:50 ` Sagar Arun Kamble
2017-10-11 8:54 ` [PATCH v13 15/21] drm/i915/guc: Add comment about update needed in GuC submission enable/disable for RPM Sagar Arun Kamble
2017-10-11 8:54 ` [PATCH v13 16/21] drm/i915: Enable interrupts prior to GEM resume during i915_drm_resume Sagar Arun Kamble
2017-10-11 8:54 ` [PATCH v13 17/21] drm/i915: Split i915_gem_suspend into gem quiescing and HW suspend Sagar Arun Kamble
2017-10-11 8:54 ` [PATCH v13 18/21] drm/i915/uc: Introduce intel_uc_sanitize to initialize GuC/HuC reset state Sagar Arun Kamble
2017-10-11 17:30 ` Michal Wajdeczko
2017-10-11 17:46 ` Sagar Arun Kamble
2017-10-11 8:54 ` [PATCH v13 19/21] drm/i915/guc: Fix enable/disable of GuC GGTT invalidate functions Sagar Arun Kamble
2017-10-11 17:35 ` Michal Wajdeczko
2017-10-11 17:44 ` Sagar Arun Kamble
2017-10-11 17:58 ` Michal Wajdeczko
2017-10-11 18:09 ` Sagar Arun Kamble
2017-10-11 18:20 ` Michal Wajdeczko
2017-10-12 9:08 ` Joonas Lahtinen
2017-10-12 12:08 ` Sagar Arun Kamble
2017-10-11 8:54 ` [PATCH v13 20/21] drm/i915/guc: Disable GuC submission/interrupts/communication in intel_uc_sanitize Sagar Arun Kamble
2017-10-11 8:54 ` [PATCH v13 21/21] HAX enable GuC submission for CI Sagar Arun Kamble
2017-10-11 9:44 ` ✗ Fi.CI.BAT: failure for drm/i915: GEM/GuC Suspend/Resume/Reset fixes and restructuring Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=0ba36524-dc7d-75d9-e0ce-5342e3eacb10@intel.com \
--to=sagar.a.kamble@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=michal.wajdeczko@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox