From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH] drm/i915/ringbuffer: set force wake bit before reading ring register Date: Tue, 09 Nov 2010 10:50:29 +0000 Message-ID: <0d30dc$k4cl2t@orsmga001.jf.intel.com> References: <1289294252-1321-1-git-send-email-nanhai.zou@intel.com> <41EFD7A46E18724CAB128DAD0073348018EF9BD283@shsmsx502.ccr.corp.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 3B9339F0BD for ; Tue, 9 Nov 2010 02:50:33 -0800 (PST) In-Reply-To: <41EFD7A46E18724CAB128DAD0073348018EF9BD283@shsmsx502.ccr.corp.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: "Zou, Nanhai" , "intel-gfx@lists.freedesktop.org" , "Zhao, Jian J" List-Id: intel-gfx@lists.freedesktop.org On Tue, 9 Nov 2010 17:17:07 +0800, "Zou, Nanhai" wrote: > I have tested this patch with the read ring head from status page workaround patch reverted. > Seems it works on my SNB box. I needed to add a udelay(100) to i915_safe_read for my rev 8. Can you check if there is a recommended delay for FORCEWAKE? -Chris -- Chris Wilson, Intel Open Source Technology Centre