From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH] drm/i915: Fix restore of 965 fence regs since the register tracing change. Date: Thu, 18 Nov 2010 14:46:07 +0000 Message-ID: <0d30dc$k79tj9@orsmga001.jf.intel.com> References: <1290045900-4012-1-git-send-email-eric@anholt.net> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 1DC3D9E776 for ; Thu, 18 Nov 2010 06:46:11 -0800 (PST) In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Keith Packard , Eric Anholt , intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Thu, 18 Nov 2010 11:47:12 +0800, Keith Packard wrote: > > We were reading our 64-bit value in I915_READ64 and returning 32 bits > of it. The restoration of fence regs at resume then had a zero end > value, and the fence had no effect. > > Version 2: Split register access functions into per-size versions This also helps silence sparse since it doesn't seem able to do compile-time constant propagation dead-code elimination. Minor, yet annoying, issue. Thanks, -Chris -- Chris Wilson, Intel Open Source Technology Centre