From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH] drm/i915: Check that the plane points to the pipes framebuffer before enabling Date: Tue, 19 Apr 2011 06:55:57 +0100 Message-ID: <0d30dc$lta0jo@orsmga001.jf.intel.com> References: <1302978004-9265-1-git-send-email-chris@chris-wilson.co.uk> <1303032761-2991-1-git-send-email-chris@chris-wilson.co.uk> <20110418085444.2d020b6c@jbarnes-desktop> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 8838E9E74D for ; Mon, 18 Apr 2011 22:56:00 -0700 (PDT) In-Reply-To: <20110418085444.2d020b6c@jbarnes-desktop> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Jesse Barnes Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Mon, 18 Apr 2011 08:54:44 -0700, Jesse Barnes wrote: > I like it (though now the comment talks about DSPADDR and leaves > DSPSURF out in the cold). D'oh. That'll teach me to try and write a comment to explain a function first! > Sounds like our dpms code may be causing trouble for this x11perf run > perhaps? What else would cause us to change base addrs during a bench > run like that? Right. The early observation is that we don't assign a framebuffer to the CRTC borrowed for VGA/TV load detection. And I can postulate that we contrived to access a PTE during a hotplug poll whilst rewriting the GTT (or something similar to the object following the ringbuffer). I think we can just attach the fbcon for the purposes of load detection. -Chris -- Chris Wilson, Intel Open Source Technology Centre