* [PATCH 1/2] drm/i915: Get transcoder power domain before reading its register
@ 2019-08-01 23:28 José Roberto de Souza
2019-08-01 23:28 ` [PATCH 2/2] drm/i915/tgl: Fix the read of the DDI that transcoder is attached to José Roberto de Souza
` (4 more replies)
0 siblings, 5 replies; 9+ messages in thread
From: José Roberto de Souza @ 2019-08-01 23:28 UTC (permalink / raw)
To: intel-gfx; +Cc: Lucas De Marchi
When getting the pipes attached to encoder if it is not a eDP encoder
it iterates over all pipes and read a transcoder register.
But it should not read a transcoder register before get its power
domain.
It was not a issue in gens older than 12 because if it only had
port A connected it would be attached to EDP and it would skip all
the transcoders readout, if it had more than one port connected,
pipe B would cause PG3 to be on and it contains all other
transcoders.
But on gen 12 there is no EDP transcoder so it is always iterating
over all pipes and if only one sink is connected, PG3 is kept off
and reading other transcoders registers would cause a
unclaimed read warning.
So here getting the power domain of the transcoder only if it is
enabled, otherwise it is not connected to the DDI.
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
drivers/gpu/drm/i915/display/intel_ddi.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index fb58845020dc..660bb001be35 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -2015,6 +2015,12 @@ static void intel_ddi_get_encoder_pipes(struct intel_encoder *encoder,
for_each_pipe(dev_priv, p) {
enum transcoder cpu_transcoder = (enum transcoder)p;
unsigned int port_mask, ddi_select;
+ intel_wakeref_t trans_wakeref;
+
+ trans_wakeref = intel_display_power_get_if_enabled(dev_priv,
+ POWER_DOMAIN_TRANSCODER(cpu_transcoder));
+ if (!trans_wakeref)
+ continue;
if (INTEL_GEN(dev_priv) >= 12) {
port_mask = TGL_TRANS_DDI_PORT_MASK;
@@ -2025,6 +2031,8 @@ static void intel_ddi_get_encoder_pipes(struct intel_encoder *encoder,
}
tmp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));
+ intel_display_power_put(dev_priv, POWER_DOMAIN_TRANSCODER(cpu_transcoder),
+ trans_wakeref);
if ((tmp & port_mask) != ddi_select)
continue;
--
2.22.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 2/2] drm/i915/tgl: Fix the read of the DDI that transcoder is attached to
2019-08-01 23:28 [PATCH 1/2] drm/i915: Get transcoder power domain before reading its register José Roberto de Souza
@ 2019-08-01 23:28 ` José Roberto de Souza
2019-08-02 0:50 ` Lucas De Marchi
2019-08-01 23:54 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915: Get transcoder power domain before reading its register Patchwork
` (3 subsequent siblings)
4 siblings, 1 reply; 9+ messages in thread
From: José Roberto de Souza @ 2019-08-01 23:28 UTC (permalink / raw)
To: intel-gfx; +Cc: Lucas De Marchi
On TGL this register do not map directly to port, it was already
handled when setting it(TGL_TRANS_DDI_SELECT_PORT()) but not when
reading it.
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 9e4ee29fd0fc..b9526aa402f9 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -10353,11 +10353,17 @@ static void haswell_get_ddi_port_state(struct intel_crtc *crtc,
tmp = I915_READ(TRANS_DDI_FUNC_CTL(pipe_config->cpu_transcoder));
- if (INTEL_GEN(dev_priv) >= 12)
+ if (INTEL_GEN(dev_priv) >= 12) {
port = (tmp & TGL_TRANS_DDI_PORT_MASK) >>
TGL_TRANS_DDI_PORT_SHIFT;
- else
+ /*
+ * Register values: none = 0, DDIA = 1... while PORT_A = 0...
+ * so subtract one
+ */
+ port--;
+ } else {
port = (tmp & TRANS_DDI_PORT_MASK) >> TRANS_DDI_PORT_SHIFT;
+ }
if (INTEL_GEN(dev_priv) >= 11)
icelake_get_ddi_pll(dev_priv, port, pipe_config);
--
2.22.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 9+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915: Get transcoder power domain before reading its register
2019-08-01 23:28 [PATCH 1/2] drm/i915: Get transcoder power domain before reading its register José Roberto de Souza
2019-08-01 23:28 ` [PATCH 2/2] drm/i915/tgl: Fix the read of the DDI that transcoder is attached to José Roberto de Souza
@ 2019-08-01 23:54 ` Patchwork
2019-08-02 0:15 ` ✓ Fi.CI.BAT: success " Patchwork
` (2 subsequent siblings)
4 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2019-08-01 23:54 UTC (permalink / raw)
To: José Roberto de Souza; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915: Get transcoder power domain before reading its register
URL : https://patchwork.freedesktop.org/series/64571/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
bfb6c8381b43 drm/i915: Get transcoder power domain before reading its register
-:43: WARNING:LONG_LINE: line over 100 characters
#43: FILE: drivers/gpu/drm/i915/display/intel_ddi.c:2021:
+ POWER_DOMAIN_TRANSCODER(cpu_transcoder));
total: 0 errors, 1 warnings, 0 checks, 20 lines checked
c8a8fef007fe drm/i915/tgl: Fix the read of the DDI that transcoder is attached to
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Get transcoder power domain before reading its register
2019-08-01 23:28 [PATCH 1/2] drm/i915: Get transcoder power domain before reading its register José Roberto de Souza
2019-08-01 23:28 ` [PATCH 2/2] drm/i915/tgl: Fix the read of the DDI that transcoder is attached to José Roberto de Souza
2019-08-01 23:54 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915: Get transcoder power domain before reading its register Patchwork
@ 2019-08-02 0:15 ` Patchwork
2019-08-02 0:41 ` [PATCH 1/2] " Lucas De Marchi
2019-08-02 22:59 ` ✓ Fi.CI.IGT: success for series starting with [1/2] " Patchwork
4 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2019-08-02 0:15 UTC (permalink / raw)
To: José Roberto de Souza; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915: Get transcoder power domain before reading its register
URL : https://patchwork.freedesktop.org/series/64571/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6608 -> Patchwork_13844
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13844/
Known issues
------------
Here are the changes found in Patchwork_13844 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live_hangcheck:
- fi-icl-dsi: [PASS][1] -> [INCOMPLETE][2] ([fdo#107713] / [fdo#108569])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6608/fi-icl-dsi/igt@i915_selftest@live_hangcheck.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13844/fi-icl-dsi/igt@i915_selftest@live_hangcheck.html
* igt@kms_busy@basic-flip-c:
- fi-kbl-7500u: [PASS][3] -> [SKIP][4] ([fdo#109271] / [fdo#109278]) +2 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6608/fi-kbl-7500u/igt@kms_busy@basic-flip-c.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13844/fi-kbl-7500u/igt@kms_busy@basic-flip-c.html
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-kbl-7567u: [PASS][5] -> [WARN][6] ([fdo#109380])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6608/fi-kbl-7567u/igt@kms_chamelium@common-hpd-after-suspend.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13844/fi-kbl-7567u/igt@kms_chamelium@common-hpd-after-suspend.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-icl-u2: [PASS][7] -> [FAIL][8] ([fdo#109483])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6608/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13844/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html
* igt@kms_pipe_crc_basic@read-crc-pipe-c:
- fi-kbl-7567u: [PASS][9] -> [SKIP][10] ([fdo#109271]) +23 similar issues
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6608/fi-kbl-7567u/igt@kms_pipe_crc_basic@read-crc-pipe-c.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13844/fi-kbl-7567u/igt@kms_pipe_crc_basic@read-crc-pipe-c.html
* igt@prime_vgem@basic-fence-read:
- fi-bsw-kefka: [PASS][11] -> [INCOMPLETE][12] ([fdo#111278])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6608/fi-bsw-kefka/igt@prime_vgem@basic-fence-read.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13844/fi-bsw-kefka/igt@prime_vgem@basic-fence-read.html
* igt@prime_vgem@basic-sync-default:
- fi-bxt-j4205: [PASS][13] -> [FAIL][14] ([fdo#111277])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6608/fi-bxt-j4205/igt@prime_vgem@basic-sync-default.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13844/fi-bxt-j4205/igt@prime_vgem@basic-sync-default.html
#### Possible fixes ####
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [FAIL][15] ([fdo#109485]) -> [PASS][16]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6608/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13844/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
* igt@prime_vgem@basic-fence-mmap:
- fi-byt-j1900: [INCOMPLETE][17] ([fdo#102657] / [fdo#111276]) -> [PASS][18]
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6608/fi-byt-j1900/igt@prime_vgem@basic-fence-mmap.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13844/fi-byt-j1900/igt@prime_vgem@basic-fence-mmap.html
* igt@prime_vgem@basic-fence-read:
- fi-pnv-d510: [INCOMPLETE][19] ([fdo#110740]) -> [PASS][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6608/fi-pnv-d510/igt@prime_vgem@basic-fence-read.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13844/fi-pnv-d510/igt@prime_vgem@basic-fence-read.html
- fi-gdg-551: [INCOMPLETE][21] ([fdo#108316]) -> [PASS][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6608/fi-gdg-551/igt@prime_vgem@basic-fence-read.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13844/fi-gdg-551/igt@prime_vgem@basic-fence-read.html
* igt@prime_vgem@basic-wait-default:
- fi-bxt-j4205: [FAIL][23] ([fdo#111277]) -> [PASS][24]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6608/fi-bxt-j4205/igt@prime_vgem@basic-wait-default.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13844/fi-bxt-j4205/igt@prime_vgem@basic-wait-default.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102657]: https://bugs.freedesktop.org/show_bug.cgi?id=102657
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#108316]: https://bugs.freedesktop.org/show_bug.cgi?id=108316
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109380]: https://bugs.freedesktop.org/show_bug.cgi?id=109380
[fdo#109483]: https://bugs.freedesktop.org/show_bug.cgi?id=109483
[fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485
[fdo#110740]: https://bugs.freedesktop.org/show_bug.cgi?id=110740
[fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045
[fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
[fdo#111276]: https://bugs.freedesktop.org/show_bug.cgi?id=111276
[fdo#111277]: https://bugs.freedesktop.org/show_bug.cgi?id=111277
[fdo#111278]: https://bugs.freedesktop.org/show_bug.cgi?id=111278
Participating hosts (50 -> 43)
------------------------------
Missing (7): fi-kbl-soraka fi-byt-squawks fi-bsw-cyan fi-icl-u3 fi-icl-y fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_6608 -> Patchwork_13844
CI-20190529: 20190529
CI_DRM_6608: 1cf2b904480777766f471ef03add09a8e9c585f8 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5120: b3138fbea79d5d7935e53530b90efe3e816236f4 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13844: c8a8fef007fe865f325f7ad27c9d770a711aa2ff @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
c8a8fef007fe drm/i915/tgl: Fix the read of the DDI that transcoder is attached to
bfb6c8381b43 drm/i915: Get transcoder power domain before reading its register
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13844/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 1/2] drm/i915: Get transcoder power domain before reading its register
2019-08-01 23:28 [PATCH 1/2] drm/i915: Get transcoder power domain before reading its register José Roberto de Souza
` (2 preceding siblings ...)
2019-08-02 0:15 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2019-08-02 0:41 ` Lucas De Marchi
2019-08-02 1:08 ` Souza, Jose
2019-08-02 22:59 ` ✓ Fi.CI.IGT: success for series starting with [1/2] " Patchwork
4 siblings, 1 reply; 9+ messages in thread
From: Lucas De Marchi @ 2019-08-02 0:41 UTC (permalink / raw)
To: José Roberto de Souza; +Cc: intel-gfx
On Thu, Aug 01, 2019 at 04:28:11PM -0700, Jose Souza wrote:
>When getting the pipes attached to encoder if it is not a eDP encoder
>it iterates over all pipes and read a transcoder register.
>But it should not read a transcoder register before get its power
>domain.
>
>It was not a issue in gens older than 12 because if it only had
>port A connected it would be attached to EDP and it would skip all
>the transcoders readout, if it had more than one port connected,
>pipe B would cause PG3 to be on and it contains all other
>transcoders.
>
>But on gen 12 there is no EDP transcoder so it is always iterating
>over all pipes and if only one sink is connected, PG3 is kept off
>and reading other transcoders registers would cause a
>unclaimed read warning.
>
>So here getting the power domain of the transcoder only if it is
>enabled, otherwise it is not connected to the DDI.
>
>Cc: Lucas De Marchi <lucas.demarchi@intel.com>
>Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
>---
> drivers/gpu/drm/i915/display/intel_ddi.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
>index fb58845020dc..660bb001be35 100644
>--- a/drivers/gpu/drm/i915/display/intel_ddi.c
>+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
>@@ -2015,6 +2015,12 @@ static void intel_ddi_get_encoder_pipes(struct intel_encoder *encoder,
> for_each_pipe(dev_priv, p) {
> enum transcoder cpu_transcoder = (enum transcoder)p;
> unsigned int port_mask, ddi_select;
>+ intel_wakeref_t trans_wakeref;
>+
>+ trans_wakeref = intel_display_power_get_if_enabled(dev_priv,
>+ POWER_DOMAIN_TRANSCODER(cpu_transcoder));
And on Tiger Lake POWER_DOMAIN_TRANSCODER_B, POWER_DOMAIN_TRANSCODER_C
and POWER_DOMAIN_TRANSCODER_D are on PW3. POWER_DOMAIN_TRANSCODER_A is
on PW1.
Looks correct.
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Are the warnings now fixed?
thanks
Lucas De Marchi
>+ if (!trans_wakeref)
>+ continue;
>
> if (INTEL_GEN(dev_priv) >= 12) {
> port_mask = TGL_TRANS_DDI_PORT_MASK;
>@@ -2025,6 +2031,8 @@ static void intel_ddi_get_encoder_pipes(struct intel_encoder *encoder,
> }
>
> tmp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));
>+ intel_display_power_put(dev_priv, POWER_DOMAIN_TRANSCODER(cpu_transcoder),
>+ trans_wakeref);
>
> if ((tmp & port_mask) != ddi_select)
> continue;
>--
>2.22.0
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 2/2] drm/i915/tgl: Fix the read of the DDI that transcoder is attached to
2019-08-01 23:28 ` [PATCH 2/2] drm/i915/tgl: Fix the read of the DDI that transcoder is attached to José Roberto de Souza
@ 2019-08-02 0:50 ` Lucas De Marchi
2019-08-02 1:07 ` Souza, Jose
0 siblings, 1 reply; 9+ messages in thread
From: Lucas De Marchi @ 2019-08-02 0:50 UTC (permalink / raw)
To: José Roberto de Souza; +Cc: intel-gfx
On Thu, Aug 01, 2019 at 04:28:12PM -0700, Jose Souza wrote:
>On TGL this register do not map directly to port, it was already
>handled when setting it(TGL_TRANS_DDI_SELECT_PORT()) but not when
>reading it.
>
>Cc: Lucas De Marchi <lucas.demarchi@intel.com>
>Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
>---
> drivers/gpu/drm/i915/display/intel_display.c | 10 ++++++++--
> 1 file changed, 8 insertions(+), 2 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
>index 9e4ee29fd0fc..b9526aa402f9 100644
>--- a/drivers/gpu/drm/i915/display/intel_display.c
>+++ b/drivers/gpu/drm/i915/display/intel_display.c
>@@ -10353,11 +10353,17 @@ static void haswell_get_ddi_port_state(struct intel_crtc *crtc,
>
> tmp = I915_READ(TRANS_DDI_FUNC_CTL(pipe_config->cpu_transcoder));
>
>- if (INTEL_GEN(dev_priv) >= 12)
>+ if (INTEL_GEN(dev_priv) >= 12) {
> port = (tmp & TGL_TRANS_DDI_PORT_MASK) >>
> TGL_TRANS_DDI_PORT_SHIFT;
>- else
>+ /*
>+ * Register values: none = 0, DDIA = 1... while PORT_A = 0...
>+ * so subtract one
>+ */
>+ port--;
port = TGL_PORT_TRANS_DDI_SELECT(tmp)
and put the macro right below the TGL_TRANS_DDI_SELECT_PORT() so the
intent is explicit and we don't forget again. Then you can remove the
comment.
any chance of tmp being none and the -1 underflow?
Lucas De Marchi
>+ } else {
> port = (tmp & TRANS_DDI_PORT_MASK) >> TRANS_DDI_PORT_SHIFT;
>+ }
>
> if (INTEL_GEN(dev_priv) >= 11)
> icelake_get_ddi_pll(dev_priv, port, pipe_config);
>--
>2.22.0
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 2/2] drm/i915/tgl: Fix the read of the DDI that transcoder is attached to
2019-08-02 0:50 ` Lucas De Marchi
@ 2019-08-02 1:07 ` Souza, Jose
0 siblings, 0 replies; 9+ messages in thread
From: Souza, Jose @ 2019-08-02 1:07 UTC (permalink / raw)
To: De Marchi, Lucas; +Cc: intel-gfx@lists.freedesktop.org
On Thu, 2019-08-01 at 17:50 -0700, Lucas De Marchi wrote:
> On Thu, Aug 01, 2019 at 04:28:12PM -0700, Jose Souza wrote:
> > On TGL this register do not map directly to port, it was already
> > handled when setting it(TGL_TRANS_DDI_SELECT_PORT()) but not when
> > reading it.
> >
> > Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_display.c | 10 ++++++++--
> > 1 file changed, 8 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> > b/drivers/gpu/drm/i915/display/intel_display.c
> > index 9e4ee29fd0fc..b9526aa402f9 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -10353,11 +10353,17 @@ static void
> > haswell_get_ddi_port_state(struct intel_crtc *crtc,
> >
> > tmp = I915_READ(TRANS_DDI_FUNC_CTL(pipe_config-
> > >cpu_transcoder));
> >
> > - if (INTEL_GEN(dev_priv) >= 12)
> > + if (INTEL_GEN(dev_priv) >= 12) {
> > port = (tmp & TGL_TRANS_DDI_PORT_MASK) >>
> > TGL_TRANS_DDI_PORT_SHIFT;
> > - else
> > + /*
> > + * Register values: none = 0, DDIA = 1... while PORT_A
> > = 0...
> > + * so subtract one
> > + */
> > + port--;
>
> port = TGL_PORT_TRANS_DDI_SELECT(tmp)
>
> and put the macro right below the TGL_TRANS_DDI_SELECT_PORT() so the
> intent is explicit and we don't forget again. Then you can remove the
> comment.
I liked the idea of add a macro but not sure about this name, going to
think in a better one.
>
> any chance of tmp being none and the -1 underflow?
I guess the intention of have 0 = none is DP MST but we are programing
the DDI_SELECT even on slaves, if we stop to do that we would need to
do changes in this function.
>
> Lucas De Marchi
>
>
> > + } else {
> > port = (tmp & TRANS_DDI_PORT_MASK) >>
> > TRANS_DDI_PORT_SHIFT;
> > + }
> >
> > if (INTEL_GEN(dev_priv) >= 11)
> > icelake_get_ddi_pll(dev_priv, port, pipe_config);
> > --
> > 2.22.0
> >
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 1/2] drm/i915: Get transcoder power domain before reading its register
2019-08-02 0:41 ` [PATCH 1/2] " Lucas De Marchi
@ 2019-08-02 1:08 ` Souza, Jose
0 siblings, 0 replies; 9+ messages in thread
From: Souza, Jose @ 2019-08-02 1:08 UTC (permalink / raw)
To: De Marchi, Lucas; +Cc: intel-gfx@lists.freedesktop.org
On Thu, 2019-08-01 at 17:41 -0700, Lucas De Marchi wrote:
> On Thu, Aug 01, 2019 at 04:28:11PM -0700, Jose Souza wrote:
> > When getting the pipes attached to encoder if it is not a eDP
> > encoder
> > it iterates over all pipes and read a transcoder register.
> > But it should not read a transcoder register before get its power
> > domain.
> >
> > It was not a issue in gens older than 12 because if it only had
> > port A connected it would be attached to EDP and it would skip all
> > the transcoders readout, if it had more than one port connected,
> > pipe B would cause PG3 to be on and it contains all other
> > transcoders.
> >
> > But on gen 12 there is no EDP transcoder so it is always iterating
> > over all pipes and if only one sink is connected, PG3 is kept off
> > and reading other transcoders registers would cause a
> > unclaimed read warning.
> >
> > So here getting the power domain of the transcoder only if it is
> > enabled, otherwise it is not connected to the DDI.
> >
> > Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_ddi.c | 8 ++++++++
> > 1 file changed, 8 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> > b/drivers/gpu/drm/i915/display/intel_ddi.c
> > index fb58845020dc..660bb001be35 100644
> > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > @@ -2015,6 +2015,12 @@ static void
> > intel_ddi_get_encoder_pipes(struct intel_encoder *encoder,
> > for_each_pipe(dev_priv, p) {
> > enum transcoder cpu_transcoder = (enum transcoder)p;
> > unsigned int port_mask, ddi_select;
> > + intel_wakeref_t trans_wakeref;
> > +
> > + trans_wakeref =
> > intel_display_power_get_if_enabled(dev_priv,
> > + POWE
> > R_DOMAIN_TRANSCODER(cpu_transcoder));
>
> And on Tiger Lake POWER_DOMAIN_TRANSCODER_B,
> POWER_DOMAIN_TRANSCODER_C
> and POWER_DOMAIN_TRANSCODER_D are on PW3. POWER_DOMAIN_TRANSCODER_A
> is
> on PW1.
>
> Looks correct.
>
> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
>
> Are the warnings now fixed?
With only eDP connected yes, we still have a few with eDP+HDMI.
>
> thanks
> Lucas De Marchi
>
>
>
>
> > + if (!trans_wakeref)
> > + continue;
> >
> > if (INTEL_GEN(dev_priv) >= 12) {
> > port_mask = TGL_TRANS_DDI_PORT_MASK;
> > @@ -2025,6 +2031,8 @@ static void
> > intel_ddi_get_encoder_pipes(struct intel_encoder *encoder,
> > }
> >
> > tmp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));
> > + intel_display_power_put(dev_priv,
> > POWER_DOMAIN_TRANSCODER(cpu_transcoder),
> > + trans_wakeref);
> >
> > if ((tmp & port_mask) != ddi_select)
> > continue;
> > --
> > 2.22.0
> >
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Get transcoder power domain before reading its register
2019-08-01 23:28 [PATCH 1/2] drm/i915: Get transcoder power domain before reading its register José Roberto de Souza
` (3 preceding siblings ...)
2019-08-02 0:41 ` [PATCH 1/2] " Lucas De Marchi
@ 2019-08-02 22:59 ` Patchwork
4 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2019-08-02 22:59 UTC (permalink / raw)
To: José Roberto de Souza; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915: Get transcoder power domain before reading its register
URL : https://patchwork.freedesktop.org/series/64571/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6608_full -> Patchwork_13844_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_13844_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_isolation@rcs0-s3:
- shard-apl: [PASS][1] -> [DMESG-WARN][2] ([fdo#108566]) +2 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6608/shard-apl3/igt@gem_ctx_isolation@rcs0-s3.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13844/shard-apl7/igt@gem_ctx_isolation@rcs0-s3.html
* igt@gem_flink_race@flink_name:
- shard-apl: [PASS][3] -> [INCOMPLETE][4] ([fdo#103927]) +2 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6608/shard-apl1/igt@gem_flink_race@flink_name.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13844/shard-apl3/igt@gem_flink_race@flink_name.html
* igt@gem_persistent_relocs@forked-thrash-inactive:
- shard-iclb: [PASS][5] -> [INCOMPLETE][6] ([fdo#107713])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6608/shard-iclb3/igt@gem_persistent_relocs@forked-thrash-inactive.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13844/shard-iclb7/igt@gem_persistent_relocs@forked-thrash-inactive.html
* igt@kms_cursor_crc@pipe-a-cursor-suspend:
- shard-kbl: [PASS][7] -> [DMESG-WARN][8] ([fdo#108566]) +4 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6608/shard-kbl2/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13844/shard-kbl1/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
* igt@kms_flip@dpms-vs-vblank-race-interruptible:
- shard-glk: [PASS][9] -> [FAIL][10] ([fdo#103060])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6608/shard-glk9/igt@kms_flip@dpms-vs-vblank-race-interruptible.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13844/shard-glk9/igt@kms_flip@dpms-vs-vblank-race-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank:
- shard-skl: [PASS][11] -> [FAIL][12] ([fdo#105363]) +1 similar issue
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6608/shard-skl2/igt@kms_flip@flip-vs-expired-vblank.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13844/shard-skl8/igt@kms_flip@flip-vs-expired-vblank.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-render:
- shard-iclb: [PASS][13] -> [FAIL][14] ([fdo#103167]) +3 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6608/shard-iclb7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-render.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13844/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-render.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- shard-skl: [PASS][15] -> [INCOMPLETE][16] ([fdo#104108])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6608/shard-skl1/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13844/shard-skl6/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
* igt@kms_psr@psr2_no_drrs:
- shard-iclb: [PASS][17] -> [SKIP][18] ([fdo#109441]) +1 similar issue
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6608/shard-iclb2/igt@kms_psr@psr2_no_drrs.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13844/shard-iclb5/igt@kms_psr@psr2_no_drrs.html
* igt@perf@polling:
- shard-skl: [PASS][19] -> [FAIL][20] ([fdo#110728])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6608/shard-skl2/igt@perf@polling.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13844/shard-skl8/igt@perf@polling.html
#### Possible fixes ####
* igt@gem_eio@in-flight-contexts-immediate:
- shard-skl: [DMESG-WARN][21] -> [PASS][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6608/shard-skl6/igt@gem_eio@in-flight-contexts-immediate.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13844/shard-skl4/igt@gem_eio@in-flight-contexts-immediate.html
* igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c:
- shard-iclb: [INCOMPLETE][23] ([fdo#107713]) -> [PASS][24]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6608/shard-iclb7/igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13844/shard-iclb4/igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c.html
* igt@kms_cursor_crc@pipe-c-cursor-suspend:
- shard-kbl: [DMESG-WARN][25] ([fdo#108566]) -> [PASS][26] +2 similar issues
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6608/shard-kbl1/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13844/shard-kbl2/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-apl: [DMESG-WARN][27] ([fdo#108566]) -> [PASS][28] +2 similar issues
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6608/shard-apl4/igt@kms_flip@flip-vs-suspend-interruptible.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13844/shard-apl2/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible:
- shard-skl: [FAIL][29] ([fdo#100368]) -> [PASS][30]
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6608/shard-skl1/igt@kms_flip@plain-flip-fb-recreate-interruptible.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13844/shard-skl9/igt@kms_flip@plain-flip-fb-recreate-interruptible.html
* igt@kms_frontbuffer_tracking@basic:
- shard-iclb: [FAIL][31] ([fdo#103167]) -> [PASS][32] +3 similar issues
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6608/shard-iclb7/igt@kms_frontbuffer_tracking@basic.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13844/shard-iclb2/igt@kms_frontbuffer_tracking@basic.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-plflip-blt:
- shard-skl: [FAIL][33] ([fdo#103167]) -> [PASS][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6608/shard-skl4/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-plflip-blt.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13844/shard-skl2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-plflip-blt.html
* igt@kms_plane@pixel-format-pipe-b-planes-source-clamping:
- shard-iclb: [INCOMPLETE][35] ([fdo#107713] / [fdo#110036 ]) -> [PASS][36]
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6608/shard-iclb1/igt@kms_plane@pixel-format-pipe-b-planes-source-clamping.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13844/shard-iclb2/igt@kms_plane@pixel-format-pipe-b-planes-source-clamping.html
* igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
- shard-skl: [FAIL][37] ([fdo#108145]) -> [PASS][38]
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6608/shard-skl4/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13844/shard-skl2/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
* igt@kms_psr@no_drrs:
- shard-iclb: [FAIL][39] ([fdo#108341]) -> [PASS][40]
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6608/shard-iclb1/igt@kms_psr@no_drrs.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13844/shard-iclb5/igt@kms_psr@no_drrs.html
* igt@kms_psr@psr2_primary_mmap_cpu:
- shard-iclb: [SKIP][41] ([fdo#109441]) -> [PASS][42] +2 similar issues
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6608/shard-iclb3/igt@kms_psr@psr2_primary_mmap_cpu.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13844/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html
* igt@perf_pmu@rc6:
- shard-kbl: [SKIP][43] ([fdo#109271]) -> [PASS][44]
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6608/shard-kbl1/igt@perf_pmu@rc6.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13844/shard-kbl4/igt@perf_pmu@rc6.html
#### Warnings ####
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-mmap-gtt:
- shard-skl: [FAIL][45] ([fdo#108040]) -> [FAIL][46] ([fdo#103167])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6608/shard-skl7/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-mmap-gtt.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13844/shard-skl1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-mmap-gtt.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#100368]: https://bugs.freedesktop.org/show_bug.cgi?id=100368
[fdo#103060]: https://bugs.freedesktop.org/show_bug.cgi?id=103060
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
[fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#108040]: https://bugs.freedesktop.org/show_bug.cgi?id=108040
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108341]: https://bugs.freedesktop.org/show_bug.cgi?id=108341
[fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#110036 ]: https://bugs.freedesktop.org/show_bug.cgi?id=110036
[fdo#110728]: https://bugs.freedesktop.org/show_bug.cgi?id=110728
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_6608 -> Patchwork_13844
CI-20190529: 20190529
CI_DRM_6608: 1cf2b904480777766f471ef03add09a8e9c585f8 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5120: b3138fbea79d5d7935e53530b90efe3e816236f4 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13844: c8a8fef007fe865f325f7ad27c9d770a711aa2ff @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13844/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2019-08-02 22:59 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2019-08-01 23:28 [PATCH 1/2] drm/i915: Get transcoder power domain before reading its register José Roberto de Souza
2019-08-01 23:28 ` [PATCH 2/2] drm/i915/tgl: Fix the read of the DDI that transcoder is attached to José Roberto de Souza
2019-08-02 0:50 ` Lucas De Marchi
2019-08-02 1:07 ` Souza, Jose
2019-08-01 23:54 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915: Get transcoder power domain before reading its register Patchwork
2019-08-02 0:15 ` ✓ Fi.CI.BAT: success " Patchwork
2019-08-02 0:41 ` [PATCH 1/2] " Lucas De Marchi
2019-08-02 1:08 ` Souza, Jose
2019-08-02 22:59 ` ✓ Fi.CI.IGT: success for series starting with [1/2] " Patchwork
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