From mboxrd@z Thu Jan 1 00:00:00 1970 From: Kenneth Graunke Subject: Re: [PATCH] drm/i915: Fix IPS related flicker Date: Thu, 28 May 2015 16:57:49 -0700 Message-ID: <10309208.nNUfG35zQ0@eiger> References: <1432237983-3795-1-git-send-email-rodrigo.vivi@intel.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1954743622==" Return-path: Received: from smtp137.dfw.emailsrvr.com (smtp137.dfw.emailsrvr.com [67.192.241.137]) by gabe.freedesktop.org (Postfix) with ESMTP id E410B6E043 for ; Thu, 28 May 2015 16:57:52 -0700 (PDT) In-Reply-To: <1432237983-3795-1-git-send-email-rodrigo.vivi@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: intel-gfx@lists.freedesktop.org Cc: Joe Konno , Paulo Zanoni , Rodrigo Vivi List-Id: intel-gfx@lists.freedesktop.org --===============1954743622== Content-Type: multipart/signed; boundary="nextPart4714227.CS82cdCINn"; micalg="pgp-sha256"; protocol="application/pgp-signature" --nextPart4714227.CS82cdCINn Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" On Thursday, May 21, 2015 12:53:03 PM Rodrigo Vivi wrote: > We cannot let IPS enabled with no plane on the pipe: > > BSpec: "IPS cannot be enabled until after at least one plane has > been enabled for at least one vertical blank." and "IPS must be > disabled while there is still at least one plane enabled on the > same pipe as IPS. > > However this shortcut path to make primary plane invisible when > updating primary plane was leting IPS enabled while there was no > other plane enabled on the pipe causing flickerings that we were > believing that it was caused by that other restriction where > ips cannot be used when pixel rate is greater than 95% of cdclok. > > Reference: https://bugs.freedesktop.org/show_bug.cgi?id=85583 > Cc: Joe Konno > Cc: Paulo Zanoni > Signed-off-by: Rodrigo Vivi > --- > drivers/gpu/drm/i915/intel_display.c | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 9d2d6fb..5519d56 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -2789,6 +2789,19 @@ static void ironlake_update_primary_plane(struct drm_crtc *crtc, > int pixel_size; > > if (!visible || !fb) { > + /* > + * This shortcut path disables the primary plane making > + * IPS really sad and lost when it is enabled alone with no > + * plane around on the pipe. So, for now it is safe to disable > + * IPS here. > + / > + /* > + * FIXME: Any other plane enabled should be enough so it would > + * be better to check if there is really no sprite or > + * cursor around. > + */ > + hsw_disable_ips(intel_crtc); > + > I915_WRITE(reg, 0); > I915_WRITE(DSPSURF(plane), 0); > POSTING_READ(reg); This fixes a bug on my Lenovo X250 (Broadwell GT2). 1. Boot 2. startx using SNA and KDE 5 3. Quit X Prior to this patch, the screen was all scrambled. With this patch, it works perfectly. Thanks, Rodrigo! Tested-by: Kenneth Graunke --nextPart4714227.CS82cdCINn Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part. Content-Transfer-Encoding: 7Bit -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABCAAGBQJVZ6t9AAoJEFtb2gcdScw4nsMQAJRpqjDdkUcY4qKyjFEa7NZ7 /+fzwnKKapsU33LUc+XP48mRvzl6Sl2aEZ8bfxChJt/yeUwJX6D+DYV7l/3jaKQm sldIgunQqNzeP8oKqI17q6oyZp085euS9DaIHfazF4ev7162CcVfJ2zpn8YQSZFX 577QG2KnaiJBXjML45leuABl4UIhrHkgg0MGYEfcNGWh0zQiRiN+F0T5nS39T3no Nz/R2lw60wr2QpTVrH2LziH9S9pqEFY00WHUWwIeZXmk3dfMIySSs++ErXX7GdBP aaHtfGumprtjlW9a09/MehitVjqzwLKFzY+e/Y/wuaXTMqKXd915IDhGiCHaxP9f Ev/CjIRLQxmLQQJ8rTAcNYcWAXAAFeP/SrhxUV6iVCOWtt4biNUKHk0GbZfSK6fK yABKY2dVn2aVeKFUcWtqT33jqbsOvABGknNJbv9O14Hn8KC8HmwZ9J2Q9JUCQMp3 B2DGXeRvR4DKpp/I9nLdbHjJjHy3KuXVhP/ooObH+R5DCES/NAfkdpOuMaEYoNjD 4VOB8maDfOv1NeYjjJRrVlYg0RR/IVTcsmD8YHO1R4Ef07MgioQg04xfjdhWYXFR mcXYqEZSMefuLmWchjvT2yQaOgjPm/1Xvq92Qy+rD1Q21q8d0so8N+jvRX1nG1Im X6dKmMxNoMnlZ2GNHyEU =L3Gs -----END PGP SIGNATURE----- --nextPart4714227.CS82cdCINn-- --===============1954743622== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Content-Disposition: inline X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KSW50ZWwtZ2Z4 IG1haWxpbmcgbGlzdApJbnRlbC1nZnhAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHA6Ly9saXN0 cy5mcmVlZGVza3RvcC5vcmcvbWFpbG1hbi9saXN0aW5mby9pbnRlbC1nZngK --===============1954743622==--