From: Zhenyu Wang <zhenyuw@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 3/4] drm/i915: save/restore MI_ARB_STATE only before gen6
Date: Wed, 23 Mar 2011 10:21:08 +0800 [thread overview]
Message-ID: <1300846869-28245-4-git-send-email-zhenyuw@linux.intel.com> (raw)
In-Reply-To: <1300846869-28245-1-git-send-email-zhenyuw@linux.intel.com>
MI_ARB_STATE address is not available on Gen6.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
---
drivers/gpu/drm/i915/i915_suspend.c | 6 ++++--
1 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index 8d165c4..bce24d8 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -828,7 +828,8 @@ int i915_save_state(struct drm_device *dev)
dev_priv->saveCACHE_MODE_0 = I915_READ(CACHE_MODE_0);
/* Memory Arbitration state */
- dev_priv->saveMI_ARB_STATE = I915_READ(MI_ARB_STATE);
+ if (dev_priv->info->gen < 6)
+ dev_priv->saveMI_ARB_STATE = I915_READ(MI_ARB_STATE);
/* Scratch space */
for (i = 0; i < 16; i++) {
@@ -881,7 +882,8 @@ int i915_restore_state(struct drm_device *dev)
I915_WRITE (CACHE_MODE_0, dev_priv->saveCACHE_MODE_0 | 0xffff0000);
/* Memory arbitration state */
- I915_WRITE (MI_ARB_STATE, dev_priv->saveMI_ARB_STATE | 0xffff0000);
+ if (dev_priv->info->gen < 6)
+ I915_WRITE (MI_ARB_STATE, dev_priv->saveMI_ARB_STATE | 0xffff0000);
for (i = 0; i < 16; i++) {
I915_WRITE(SWF00 + (i << 2), dev_priv->saveSWF0[i]);
--
1.7.4.1
next prev parent reply other threads:[~2011-03-23 2:21 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-03-23 2:21 [PATCH 0/4 rev2] Sandybridge suspend/resume fixes Zhenyu Wang
2011-03-23 2:21 ` [PATCH 1/4] drm/i915: clock gating fix for gen5 and gen6 Zhenyu Wang
2011-03-23 2:21 ` [PATCH 2/4] drm/i915: save/restore DSPARB only for chips before gen4 but not for G33 Zhenyu Wang
2011-03-23 3:03 ` Keith Packard
2011-03-23 4:20 ` Zhenyu Wang
2011-03-23 2:21 ` Zhenyu Wang [this message]
2011-03-23 2:21 ` [PATCH 4/4] drm/i915: move sandybridge RC6 enable in resume after ring initialization Zhenyu Wang
2011-03-23 6:22 ` [PATCH 0/4 rev2] Sandybridge suspend/resume fixes Fu Michael
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