From mboxrd@z Thu Jan 1 00:00:00 1970 From: Adam Jackson Subject: Re: Where is SDVO mode setting code in kernel module sources? Date: Wed, 19 Oct 2011 10:28:13 -0400 Message-ID: <1319034493.12938.8.camel@atropine> References: <1319031591.12373.2.camel@atropine> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1699915260==" Return-path: Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) by gabe.freedesktop.org (Postfix) with ESMTP id F11C59EFA2 for ; Wed, 19 Oct 2011 07:28:15 -0700 (PDT) In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: 4ernov <4ernov@gmail.com> Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org --===============1699915260== Content-Type: multipart/signed; micalg="pgp-sha1"; protocol="application/pgp-signature"; boundary="=-FMy0RxFXuBUhTHELQ7/P" --=-FMy0RxFXuBUhTHELQ7/P Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Wed, 2011-10-19 at 17:48 +0400, 4ernov wrote: > Thanks, Adam. But is there any pipe setup part specific for certain > output? I need to find a place where converter is set to use 24 or 18 > bit LVDS mode. I examined intel_sdvo.c quite long but still cannot > find what I want. We don't appear to have any code for that already written. intel_sdvo_regs.h does document an SDVO command pair that looks relevant: #define SDVO_CMD_GET_LVDS_PANEL_INFORMATION 0x7f #define SDVO_CMD_SET_LVDS_PANEL_INFORMATION 0x80 # define SDVO_LVDS_COLOR_DEPTH_18 (0 << 0) # define SDVO_LVDS_COLOR_DEPTH_24 (1 << 0) # define SDVO_LVDS_CONNECTOR_SPWG (0 << 2) # define SDVO_LVDS_CONNECTOR_OPENLDI (1 << 2) # define SDVO_LVDS_SINGLE_CHANNEL (0 << 4) # define SDVO_LVDS_DUAL_CHANNEL (1 << 4) I assume the SDVO LVDS options block in the VBT would tell us what bits are correct to program here, but intel_bios.h documents only the layout of that structure, not its content. Or, we can hope that the SDVO card set it up correctly for us (hah). Intel people, care to shed some light here? - ajax --=-FMy0RxFXuBUhTHELQ7/P Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iEYEABECAAYFAk6e3n0ACgkQW4otUKDs0NMHuwCguLxepmX1UMsR4Q3FiGTWL6CE Y60AoIUPHiuyQVU1otHBNDr02NovjaON =//Kq -----END PGP SIGNATURE----- --=-FMy0RxFXuBUhTHELQ7/P-- --===============1699915260== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============1699915260==--