From mboxrd@z Thu Jan 1 00:00:00 1970 From: Eugeni Dodonov Subject: [PATCH 08/37] drm/i915: add DP_TP_STATUS registers Date: Wed, 21 Mar 2012 22:09:43 -0300 Message-ID: <1332378612-3814-9-git-send-email-eugeni.dodonov@intel.com> References: <1332378612-3814-1-git-send-email-eugeni.dodonov@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from oproxy8-pub.bluehost.com (oproxy8-pub.bluehost.com [69.89.22.20]) by gabe.freedesktop.org (Postfix) with SMTP id 72EEEA0D06 for ; Wed, 21 Mar 2012 18:06:51 -0700 (PDT) In-Reply-To: <1332378612-3814-1-git-send-email-eugeni.dodonov@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org Cc: Eugeni Dodonov List-Id: intel-gfx@lists.freedesktop.org There is one set of those registers for each port. Signed-off-by: Eugeni Dodonov --- drivers/gpu/drm/i915/i915_reg.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 7a9232e..3831fe7 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -3906,4 +3906,12 @@ #define DP_TP_CTL_LINK_TRAIN_PAT2 (1<<8) #define DP_TP_CTL_LINK_TRAIN_NORMAL (3<<8) +/* DisplayPort Transport Status */ +#define DP_TP_STATUS_A 0x64044 +#define DP_TP_STATUS_B 0x64144 +#define DP_TP_STATUS_C 0x64244 +#define DP_TP_STATUS_D 0x64344 +#define DP_TP_STATUS_E 0x64444 +#define DP_TP_STATUS_AUTOTRAIN_DONE (1<<12) + #endif /* _I915_REG_H_ */ -- 1.7.9.2