From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 20/22] drm/i915: add HDMI and DP port enumeration on ValleyView
Date: Wed, 28 Mar 2012 13:39:40 -0700 [thread overview]
Message-ID: <1332967182-23298-21-git-send-email-jbarnes@virtuousgeek.org> (raw)
In-Reply-To: <1332967182-23298-1-git-send-email-jbarnes@virtuousgeek.org>
ValleyView is similar to IbexPeak here, but with different register
offsets.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
drivers/gpu/drm/i915/intel_display.c | 18 ++++++++++++++++++
1 files changed, 18 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index ffc0e2b..cfd4267 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -8329,6 +8329,24 @@ static void intel_setup_outputs(struct drm_device *dev)
if (!dpd_is_edp && (I915_READ(PCH_DP_D) & DP_DETECTED))
intel_dp_init(dev, PCH_DP_D);
+ } else if (IS_VALLEYVIEW(dev)) {
+ int found;
+
+ if (I915_READ(VLV_HDMIB) & PORT_DETECTED) {
+ /* SDVOB multiplex with HDMIB */
+ found = intel_sdvo_init(dev, VLV_HDMIB);
+ if (!found)
+ intel_hdmi_init(dev, VLV_HDMIB);
+ if (!found && (I915_READ(DP_B) & DP_DETECTED))
+ intel_dp_init(dev, DP_B);
+ }
+
+ if (I915_READ(SDVOC) & PORT_DETECTED)
+ intel_hdmi_init(dev, SDVOC);
+
+ /* Shares lanes with HDMI on SDVOC */
+ if (!dpd_is_edp && (I915_READ(DP_C) & DP_DETECTED))
+ intel_dp_init(dev, DP_C);
} else if (SUPPORTS_DIGITAL_OUTPUTS(dev)) {
bool found = false;
--
1.7.5.4
next prev parent reply other threads:[~2012-03-28 20:47 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-03-28 20:39 ValleyView patches Jesse Barnes
2012-03-28 20:39 ` [PATCH 01/22] drm/i915: add ValleyView driver structs and IS_VALLEYVIEW macro Jesse Barnes
2012-03-28 20:39 ` [PATCH 02/22] drm/i915: ValleyView watermark support Jesse Barnes
2012-03-28 20:39 ` [PATCH 03/22] drm/i915: PLL defines for VLV Jesse Barnes
2012-03-28 20:39 ` [PATCH 04/22] drm/i915: interrupt bit definitions " Jesse Barnes
2012-03-28 21:33 ` Daniel Vetter
2012-03-28 21:39 ` Jesse Barnes
2012-03-28 21:47 ` Daniel Vetter
2012-03-28 21:50 ` Jesse Barnes
2012-03-28 20:39 ` [PATCH 05/22] drm/i915: add DPIO support Jesse Barnes
2012-03-28 20:39 ` [PATCH 06/22] drm/i915: add ValleyView clock gating init Jesse Barnes
2012-03-28 20:39 ` [PATCH 07/22] drm/i915: split PLL update code out of i9xx_crtc_mode_set Jesse Barnes
2012-03-28 20:39 ` [PATCH 08/22] drm/i915: split LVDS " Jesse Barnes
2012-03-28 20:39 ` [PATCH 09/22] drm/i915: ValleyView mode setting limits and PLL functions Jesse Barnes
2012-03-28 20:39 ` [PATCH 10/22] drm/i915: program drain latency regs on ValleyView Jesse Barnes
2012-03-28 20:39 ` [PATCH 11/22] drm/i915: Enable DP panel power sequencing for ValleyView Jesse Barnes
2012-03-28 21:59 ` Daniel Vetter
2012-03-28 23:57 ` Jesse Barnes
2012-03-28 20:39 ` [PATCH 12/22] drm/i915: Enable HDMI on ValleyView Jesse Barnes
2012-03-28 20:39 ` [PATCH 13/22] agp/intel: map more registers for use by the GTT code Jesse Barnes
2012-03-28 20:39 ` [PATCH 14/22] agp/intel: add ValleyView AGP driver Jesse Barnes
2012-03-28 20:39 ` [PATCH 15/22] agp/intel: bind " Jesse Barnes
2012-03-28 20:39 ` [PATCH 16/22] drm/i915: add ValleyView specific CRT detect function Jesse Barnes
2012-03-28 20:39 ` [PATCH 17/22] drm/i915: add ValleyView specific force wake get/put functions Jesse Barnes
2012-03-28 20:39 ` [PATCH 18/22] drm/i915: ValleyView IRQ support Jesse Barnes
2012-03-30 16:46 ` Daniel Vetter
2012-03-30 16:52 ` Daniel Vetter
2012-03-28 20:39 ` [PATCH 19/22] drm/i915: check for disabled interrupts on ValleyView Jesse Barnes
2012-03-28 20:39 ` Jesse Barnes [this message]
2012-03-28 20:39 ` [PATCH 21/22] drm/i915: disable turbo on ValleyView for now Jesse Barnes
2012-03-28 22:02 ` Daniel Vetter
2012-03-28 23:57 ` Jesse Barnes
2012-03-28 20:39 ` [PATCH 22/22] drm/i915: bind driver to ValleyView chipsets Jesse Barnes
2012-03-29 9:06 ` ValleyView patches Daniel Vetter
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