From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 22/22] drm/i915: bind driver to ValleyView chipsets
Date: Wed, 28 Mar 2012 13:39:42 -0700 [thread overview]
Message-ID: <1332967182-23298-23-git-send-email-jbarnes@virtuousgeek.org> (raw)
In-Reply-To: <1332967182-23298-1-git-send-email-jbarnes@virtuousgeek.org>
With the code in place, we can bind the driver, should make bisect possible.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
drivers/gpu/drm/i915/i915_drv.c | 3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 0d92e5e..a201265 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -316,6 +316,9 @@ static const struct pci_device_id pciidlist[] = { /* aka */
INTEL_VGA_DEVICE(0x0152, &intel_ivybridge_d_info), /* GT1 desktop */
INTEL_VGA_DEVICE(0x0162, &intel_ivybridge_d_info), /* GT2 desktop */
INTEL_VGA_DEVICE(0x015a, &intel_ivybridge_d_info), /* GT1 server */
+ INTEL_VGA_DEVICE(0x0f30, &intel_valleyview_m_info),
+ INTEL_VGA_DEVICE(0x0157, &intel_valleyview_m_info),
+ INTEL_VGA_DEVICE(0x0155, &intel_valleyview_d_info),
{0, 0, 0}
};
--
1.7.5.4
next prev parent reply other threads:[~2012-03-28 20:48 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-03-28 20:39 ValleyView patches Jesse Barnes
2012-03-28 20:39 ` [PATCH 01/22] drm/i915: add ValleyView driver structs and IS_VALLEYVIEW macro Jesse Barnes
2012-03-28 20:39 ` [PATCH 02/22] drm/i915: ValleyView watermark support Jesse Barnes
2012-03-28 20:39 ` [PATCH 03/22] drm/i915: PLL defines for VLV Jesse Barnes
2012-03-28 20:39 ` [PATCH 04/22] drm/i915: interrupt bit definitions " Jesse Barnes
2012-03-28 21:33 ` Daniel Vetter
2012-03-28 21:39 ` Jesse Barnes
2012-03-28 21:47 ` Daniel Vetter
2012-03-28 21:50 ` Jesse Barnes
2012-03-28 20:39 ` [PATCH 05/22] drm/i915: add DPIO support Jesse Barnes
2012-03-28 20:39 ` [PATCH 06/22] drm/i915: add ValleyView clock gating init Jesse Barnes
2012-03-28 20:39 ` [PATCH 07/22] drm/i915: split PLL update code out of i9xx_crtc_mode_set Jesse Barnes
2012-03-28 20:39 ` [PATCH 08/22] drm/i915: split LVDS " Jesse Barnes
2012-03-28 20:39 ` [PATCH 09/22] drm/i915: ValleyView mode setting limits and PLL functions Jesse Barnes
2012-03-28 20:39 ` [PATCH 10/22] drm/i915: program drain latency regs on ValleyView Jesse Barnes
2012-03-28 20:39 ` [PATCH 11/22] drm/i915: Enable DP panel power sequencing for ValleyView Jesse Barnes
2012-03-28 21:59 ` Daniel Vetter
2012-03-28 23:57 ` Jesse Barnes
2012-03-28 20:39 ` [PATCH 12/22] drm/i915: Enable HDMI on ValleyView Jesse Barnes
2012-03-28 20:39 ` [PATCH 13/22] agp/intel: map more registers for use by the GTT code Jesse Barnes
2012-03-28 20:39 ` [PATCH 14/22] agp/intel: add ValleyView AGP driver Jesse Barnes
2012-03-28 20:39 ` [PATCH 15/22] agp/intel: bind " Jesse Barnes
2012-03-28 20:39 ` [PATCH 16/22] drm/i915: add ValleyView specific CRT detect function Jesse Barnes
2012-03-28 20:39 ` [PATCH 17/22] drm/i915: add ValleyView specific force wake get/put functions Jesse Barnes
2012-03-28 20:39 ` [PATCH 18/22] drm/i915: ValleyView IRQ support Jesse Barnes
2012-03-30 16:46 ` Daniel Vetter
2012-03-30 16:52 ` Daniel Vetter
2012-03-28 20:39 ` [PATCH 19/22] drm/i915: check for disabled interrupts on ValleyView Jesse Barnes
2012-03-28 20:39 ` [PATCH 20/22] drm/i915: add HDMI and DP port enumeration " Jesse Barnes
2012-03-28 20:39 ` [PATCH 21/22] drm/i915: disable turbo on ValleyView for now Jesse Barnes
2012-03-28 22:02 ` Daniel Vetter
2012-03-28 23:57 ` Jesse Barnes
2012-03-28 20:39 ` Jesse Barnes [this message]
2012-03-29 9:06 ` ValleyView patches Daniel Vetter
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