From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: TIMESTAMP register Date: Wed, 18 Apr 2012 09:05:43 +0100 Message-ID: <1334736361_17281@CP5-2952> References: <36D38C1F74839847A52A484C31F3E51A154A0E59@IRSMSX101.ger.corp.intel.com> <20120417193943.GR4104@phenom.ffwll.local> <36D38C1F74839847A52A484C31F3E51A154A12B9@IRSMSX101.ger.corp.intel.com> <20120417210418.GS4104@phenom.ffwll.local> <20120417162745.229b7608@bwidawsk.net> <1334706720_15611@CP5-2952> <36D38C1F74839847A52A484C31F3E51A154A153C@IRSMSX101.ger.corp.intel.com> <1334734573_17140@CP5-2952> <36D38C1F74839847A52A484C31F3E51A154A1D9F@IRSMSX101.ger.corp.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from fireflyinternet.com (smtp.fireflyinternet.com [109.228.6.236]) by gabe.freedesktop.org (Postfix) with ESMTP id 378D79E7B8 for ; Wed, 18 Apr 2012 01:06:06 -0700 (PDT) In-Reply-To: <36D38C1F74839847A52A484C31F3E51A154A1D9F@IRSMSX101.ger.corp.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: "Lawrynowicz, Jacek" , Ben Widawsky , Daniel Vetter , "Jesse Barnes (jbarnes@virtuousgeek.org)" Cc: "intel-gfx@lists.freedesktop.org" List-Id: intel-gfx@lists.freedesktop.org On Wed, 18 Apr 2012 07:53:36 +0000, "Lawrynowicz, Jacek" wrote: > But how would I synchronize GPU and CPU clocks without access to the TIMESTAMP > register? Issue a pipecontrol, compensate for the execution latency. > And are you sure that over time both clocks won't desynchronize? Given the assurrances made in the bspec, I'm certain the timestamp will prove to be bogus and drift. -Chris -- Chris Wilson, Intel Open Source Technology Centre