From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH 02/12] drm/i915: DSL_LINEMASK is 12 bits only on gen2 Date: Thu, 03 May 2012 12:55:32 +0100 Message-ID: <1336046136_129559@CP5-2952> References: <1336010154-2946-1-git-send-email-przanoni@gmail.com> <1336010154-2946-2-git-send-email-przanoni@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from fireflyinternet.com (smtp.fireflyinternet.com [109.228.6.236]) by gabe.freedesktop.org (Postfix) with ESMTP id E8EC59E7E2 for ; Thu, 3 May 2012 04:55:41 -0700 (PDT) In-Reply-To: <1336010154-2946-2-git-send-email-przanoni@gmail.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Paulo Zanoni , intel-gfx@lists.freedesktop.org Cc: Paulo Zanoni List-Id: intel-gfx@lists.freedesktop.org On Wed, 2 May 2012 22:55:44 -0300, Paulo Zanoni wrote: > From: Paulo Zanoni > > Gen3+ is 13 bits (12:0). Gen3+ is 13 bits (12:0), and on gen2 only (11:0). For both the high bits are marked reserved, read-only so continue to mask them. > Signed-off-by: Paulo Zanoni Reviewed-by: Chris Wilson -Chris -- Chris Wilson, Intel Open Source Technology Centre