From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH] drm/i915: disable flushing_list/gpu_write_list Date: Wed, 13 Jun 2012 22:05:39 +0100 Message-ID: <1339621547_17708@CP5-2952> References: <1339613119-14692-1-git-send-email-daniel.vetter@ffwll.ch> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from fireflyinternet.com (smtp.fireflyinternet.com [109.228.6.236]) by gabe.freedesktop.org (Postfix) with ESMTP id 5B477A0989 for ; Wed, 13 Jun 2012 14:05:58 -0700 (PDT) In-Reply-To: <1339613119-14692-1-git-send-email-daniel.vetter@ffwll.ch> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Intel Graphics Development Cc: Daniel Vetter List-Id: intel-gfx@lists.freedesktop.org On Wed, 13 Jun 2012 20:45:19 +0200, Daniel Vetter wrote: > This is just the minimal patch to disable all this code so that we can > do decent amounts of QA before we rip it all out. > > The complicating thing is that we need to flush the gpu caches after > the batchbuffer is emitted. Which is past the point of no return where > execbuffer can't fail any more (otherwise we risk submitting the same > batch multiple times). > > Hence we need to add a flag to track whether any caches associated > with that ring are dirty. And emit the flush in add_request if that's > the case. > > Note that this has a quite a few behaviour changes: > - Caches get flushed/invalidated unconditionally. > - Invalidation now happens after potential inter-ring sync. > > I've bantered around a bit with Chris on irc whether this fixes > anything, and it might or might not. The only thing clear is that with > these changes it's much easier to reason about correctness. > > Also rip out a lone get_next_request_seqno in the execbuffer > retire_commands function. I've dug around and I couldn't figure out > why that is still there, with the outstanding lazy request stuff it > shouldn't be necessary. > > v2: Chris Wilson complained that I also invalidate the read caches > when flushing after a batchbuffer. Now optimized. > > v3: Added some comments to explain the new flushing behaviour. > > Cc: Eric Anholt > Cc: Chris Wilson > Signed-Off-by: Daniel Vetter This seems to work fine for 2D workloads, so Reviewed-by: Chris Wilson I'll follow up in a few days with a tested-by if nothing untoward happens. -Chris -- Chris Wilson, Intel Open Source Technology Centre