From mboxrd@z Thu Jan 1 00:00:00 1970 From: Eugeni Dodonov Subject: [PATCH 06/10] drm/i915: enable RC6 by default on Haswell Date: Mon, 2 Jul 2012 11:51:07 -0300 Message-ID: <1341240671-5843-7-git-send-email-eugeni.dodonov@intel.com> References: <1341240671-5843-1-git-send-email-eugeni.dodonov@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id A781A9F394 for ; Mon, 2 Jul 2012 07:49:12 -0700 (PDT) In-Reply-To: <1341240671-5843-1-git-send-email-eugeni.dodonov@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org Cc: Eugeni Dodonov List-Id: intel-gfx@lists.freedesktop.org It should be working so let's turn it on by default and catch any possible issues faster. Signed-off-by: Eugeni Dodonov --- drivers/gpu/drm/i915/intel_pm.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 64cd97e..b00df1f 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -2332,9 +2332,11 @@ int intel_enable_rc6(const struct drm_device *dev) if (INTEL_INFO(dev)->gen == 5) return 0; - /* Sorry Haswell, no RC6 for you for now. */ + /* On Haswell, only RC6 is available. So let's enable it by default to + * provide better testing and coverage since the beginning. + */ if (IS_HASWELL(dev)) - return 0; + return INTEL_RC6_ENABLE; /* * Disable rc6 on Sandybridge -- 1.7.11.1