From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: [PATCH 0/5] reset rework, 2nd try Date: Wed, 4 Jul 2012 22:18:38 +0200 Message-ID: <1341433123-23055-1-git-send-email-daniel.vetter@ffwll.ch> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-wi0-f171.google.com (mail-wi0-f171.google.com [209.85.212.171]) by gabe.freedesktop.org (Postfix) with ESMTP id 255E59E7C2 for ; Wed, 4 Jul 2012 13:18:51 -0700 (PDT) Received: by wibhq4 with SMTP id hq4so4146940wib.12 for ; Wed, 04 Jul 2012 13:18:51 -0700 (PDT) List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Intel Graphics Development Cc: Daniel Vetter List-Id: intel-gfx@lists.freedesktop.org Hi all, I took me a while to see the real issues Chris has been complaining about, but I think the reworked patches take them all into account now. The big change is that the wedged check at the beginning of intel_ring_begin stays, but gets improved by properly deciding betweein -EIO and -EAGAIN. I've checked all the callsites and couldn't find any issues. Comments, flames, reviews and testing reports highly welcome. I've also pushed the latest version of this to the reset-rework branch of my personal git repo. Cheers, Daniel Daniel Vetter (5): drm/i915: don't trylock in the gpu reset code drm/i915: non-interruptible sleeps can't handle -EGAIN drm/i915: don't hang userspace when the gpu reset is stuck drm/i915: properly SIGBUS on I/O errors drm/i915: don't return a spurious -EIO from intel_ring_begin drivers/gpu/drm/i915/i915_drv.c | 3 +-- drivers/gpu/drm/i915/i915_drv.h | 2 ++ drivers/gpu/drm/i915/i915_gem.c | 44 ++++++++++++++++++++++++------- drivers/gpu/drm/i915/intel_ringbuffer.c | 24 ++++++----------- 4 files changed, 45 insertions(+), 28 deletions(-) -- 1.7.10