From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ben Widawsky Subject: [PATCH 4/7] drm/i915: POSTING_READ the new rps value Date: Fri, 7 Sep 2012 19:43:41 -0700 Message-ID: <1347072225-10654-5-git-send-email-ben@bwidawsk.net> References: <1347072225-10654-1-git-send-email-ben@bwidawsk.net> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from shiva.chad-versace.us (209-20-75-48.static.cloud-ips.com [209.20.75.48]) by gabe.freedesktop.org (Postfix) with ESMTP id 7F3B2A0DC5 for ; Fri, 7 Sep 2012 19:44:30 -0700 (PDT) In-Reply-To: <1347072225-10654-1-git-send-email-ben@bwidawsk.net> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org Cc: Ben Widawsky List-Id: intel-gfx@lists.freedesktop.org In order to keep our cached values in sync with the hardware, we need a posting read here. CC: Chris Wilson Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/intel_pm.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 36c6409..4e86037 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -2338,6 +2338,8 @@ void gen6_set_rps(struct drm_device *dev, u8 val) */ I915_WRITE(GEN6_RP_INTERRUPT_LIMITS, limits); + POSTING_READ(GEN6_RPNSWREQ); + dev_priv->rps.cur_delay = val; trace_intel_gpu_freq_change(val * 50); -- 1.7.12