From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paulo Zanoni Subject: [PATCH 33/36] drm/i915: implement timing override workarounds on LPT Date: Wed, 31 Oct 2012 18:12:52 -0200 Message-ID: <1351714375-15284-34-git-send-email-przanoni@gmail.com> References: <1351714375-15284-1-git-send-email-przanoni@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-ye0-f177.google.com (mail-ye0-f177.google.com [209.85.213.177]) by gabe.freedesktop.org (Postfix) with ESMTP id C7B7BA0C35 for ; Wed, 31 Oct 2012 13:14:04 -0700 (PDT) Received: by mail-ye0-f177.google.com with SMTP id r1so354583yen.36 for ; Wed, 31 Oct 2012 13:14:04 -0700 (PDT) In-Reply-To: <1351714375-15284-1-git-send-email-przanoni@gmail.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org Cc: Paulo Zanoni List-Id: intel-gfx@lists.freedesktop.org From: Paulo Zanoni These workarounds are documented on the CRT mode set sequence. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_display.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index ae22d4d..a01901a 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1729,6 +1729,11 @@ static void lpt_enable_pch_transcoder(struct drm_i915_private *dev_priv, assert_fdi_tx_enabled(dev_priv, cpu_transcoder); assert_fdi_rx_enabled(dev_priv, TRANSCODER_A); + /* Workaround: set timing override bit. */ + val = I915_READ(_TRANSA_CHICKEN2); + val |= TRANS_AUTOTRAIN_GEN_STALL_DIS; + I915_WRITE(_TRANSA_CHICKEN2, val); + val = TRANS_ENABLE; pipeconf_val = I915_READ(PIPECONF(cpu_transcoder)); @@ -1780,6 +1785,11 @@ static void lpt_disable_pch_transcoder(struct drm_i915_private *dev_priv, /* wait for PCH transcoder off, transcoder state */ if (wait_for((I915_READ(_TRANSACONF) & TRANS_STATE_ENABLE) == 0, 50)) DRM_ERROR("Failed to disable PCH transcoder\n"); + + /* Workaround: clear timing override bit. */ + val = I915_READ(_TRANSA_CHICKEN2); + val &= ~TRANS_AUTOTRAIN_GEN_STALL_DIS; + I915_WRITE(_TRANSA_CHICKEN2, val); } /** -- 1.7.11.4