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From: Paulo Zanoni <przanoni@gmail.com>
To: intel-gfx@lists.freedesktop.org
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: [PATCH 06/10] drm/i915: check the power down well on assert_pipe()
Date: Fri, 18 Jan 2013 18:29:08 -0200	[thread overview]
Message-ID: <1358540953-3979-7-git-send-email-przanoni@gmail.com> (raw)
In-Reply-To: <1358540953-3979-1-git-send-email-przanoni@gmail.com>

From: Paulo Zanoni <paulo.r.zanoni@intel.com>

If the power well is disabled, we should not try to read its
registers, otherwise we'll get "unclaimed register" messages.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c |   12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index a7fb7e1..921b020 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1214,9 +1214,15 @@ void assert_pipe(struct drm_i915_private *dev_priv,
 	if (pipe == PIPE_A && dev_priv->quirks & QUIRK_PIPEA_FORCE)
 		state = true;
 
-	reg = PIPECONF(cpu_transcoder);
-	val = I915_READ(reg);
-	cur_state = !!(val & PIPECONF_ENABLE);
+	if (cpu_transcoder == TRANSCODER_EDP ||
+	    (I915_READ(HSW_PWR_WELL_DRIVER) & HSW_PWR_WELL_STATE)) {
+		reg = PIPECONF(cpu_transcoder);
+		val = I915_READ(reg);
+		cur_state = !!(val & PIPECONF_ENABLE);
+	} else {
+		cur_state = false;
+	}
+
 	WARN(cur_state != state,
 	     "pipe %c assertion failure (expected %s, current %s)\n",
 	     pipe_name(pipe), state_string(state), state_string(cur_state));
-- 
1.7.10.4

  parent reply	other threads:[~2013-01-18 20:29 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-01-18 20:29 [PATCH 00/10] Haswell unclaimed register fixes and power well enabling Paulo Zanoni
2013-01-18 20:29 ` [PATCH 01/10] drm/i915: don't save/restore DSPARB on gen5+ Paulo Zanoni
2013-01-24  9:26   ` Jani Nikula
2013-01-24 15:58     ` Daniel Vetter
2013-01-18 20:29 ` [PATCH 02/10] drm/i915: don't read DP_TP_STATUS(PORT_A) Paulo Zanoni
2013-01-24  9:29   ` Jani Nikula
2013-01-18 20:29 ` [PATCH 03/10] drm/i915: fix intel_init_power_wells Paulo Zanoni
2013-01-21 13:37   ` Ville Syrjälä
2013-01-22 13:02     ` Daniel Vetter
2013-01-22 13:47       ` Ville Syrjälä
2013-01-22 14:13   ` Ville Syrjälä
2013-01-24 11:39   ` Jani Nikula
2013-01-18 20:29 ` [PATCH 04/10] drm/i915: dynamic Haswell display power well support Paulo Zanoni
2013-01-24 13:15   ` Jani Nikula
2013-01-18 20:29 ` [PATCH 05/10] drm/i915: only disable enabled planes on intel_fb_restore_mode Paulo Zanoni
2013-01-18 20:29 ` Paulo Zanoni [this message]
2013-01-21 13:45   ` [PATCH 06/10] drm/i915: check the power down well on assert_pipe() Ville Syrjälä
2013-01-22 13:04     ` Daniel Vetter
2013-01-22 13:49       ` Ville Syrjälä
2013-01-25 15:40     ` Paulo Zanoni
2013-01-25 15:53       ` Ville Syrjälä
2013-01-25 16:04         ` Paulo Zanoni
2013-01-25 16:16           ` Ville Syrjälä
2013-01-18 20:29 ` [PATCH 07/10] drm/i915: turn on the power well before suspending Paulo Zanoni
2013-01-24 13:16   ` Jani Nikula
2013-01-18 20:29 ` [PATCH 08/10] drm/i915: set TRANSCODER_EDP even earlier Paulo Zanoni
2013-01-24 11:59   ` Jani Nikula
2013-01-18 20:29 ` [PATCH 09/10] drm/i915: print IVB/HSW display error interrupts Paulo Zanoni
2013-01-18 21:53   ` Ben Widawsky
2013-01-24 13:06     ` Jani Nikula
2013-01-24 13:04   ` Jani Nikula
2013-01-18 20:29 ` [PATCH 10/10] drm/i915: remove "unclaimed register" checks from I915_WRITE Paulo Zanoni
2013-01-18 20:49   ` Ben Widawsky
2013-01-18 20:56     ` Chris Wilson

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