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From: Rodrigo Vivi <rodrigo.vivi@gmail.com>
To: intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Subject: [PATCH 4/9] drm/i915: Read the EDP DPCD and PSR Capability
Date: Wed, 30 Jan 2013 16:24:46 -0200	[thread overview]
Message-ID: <1359570291-2170-5-git-send-email-rodrigo.vivi@gmail.com> (raw)
In-Reply-To: <1359570291-2170-1-git-send-email-rodrigo.vivi@gmail.com>

From: Shobhit Kumar <shobhit.kumar@intel.com>

Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>

v2: reuse of just created is_edp_psr and put it at right place.

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
---
 drivers/gpu/drm/i915/intel_dp.c  | 12 ++++++++++++
 drivers/gpu/drm/i915/intel_drv.h |  1 +
 2 files changed, 13 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index cbd3236..aeb0ef1 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1435,6 +1435,11 @@ static void intel_post_disable_dp(struct intel_encoder *encoder)
 	}
 }
 
+static bool is_edp_psr(struct intel_dp *intel_dp)
+{
+	return (is_edp(intel_dp) && (intel_dp->psr_dpcd[0] & 0x1));
+}
+
 static void intel_enable_dp(struct intel_encoder *encoder)
 {
 	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
@@ -2111,6 +2116,13 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)
 	if (intel_dp->dpcd[DP_DPCD_REV] == 0)
 		return false; /* DPCD not present */
 
+	/* Check if the panel supports PSR */
+	memset(intel_dp->psr_dpcd, 0, EDP_PSR_RECEIVER_CAP_SIZE);
+	intel_dp_aux_native_read_retry(intel_dp, DP_PSR_SUPPORT,
+				       intel_dp->psr_dpcd,
+				       sizeof(intel_dp->psr_dpcd));
+	if (is_edp_psr(intel_dp))
+		DRM_DEBUG_KMS("Detected EDP PSR Panel.\n");
 	if (!(intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] &
 	      DP_DWN_STRM_PORT_PRESENT))
 		return true; /* native DP sink */
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index aeff0d1..d4b3bac 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -371,6 +371,7 @@ struct intel_dp {
 	uint8_t link_bw;
 	uint8_t lane_count;
 	uint8_t dpcd[DP_RECEIVER_CAP_SIZE];
+	uint8_t psr_dpcd[EDP_PSR_RECEIVER_CAP_SIZE];
 	uint8_t downstream_ports[DP_MAX_DOWNSTREAM_PORTS];
 	struct i2c_adapter adapter;
 	struct i2c_algo_dp_aux_data algo;
-- 
1.7.11.7

  parent reply	other threads:[~2013-01-30 18:24 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-01-30 18:24 [PATCH 0/9] Enable eDP PSR functionality at HSW - v2 Rodrigo Vivi
2013-01-30 18:24 ` [PATCH 1/9] drm/i915: Organize VBT stuff inside drm_i915_private Rodrigo Vivi
2013-01-31  9:08   ` Jani Nikula
2013-01-30 18:24 ` [PATCH 2/9] drm/i915: Use cpu_transcoder for HSW_TVIDEO_DIP_* instead of pipe Rodrigo Vivi
2013-01-31  8:32   ` [Intel-gfx] " Jani Nikula
2013-01-31 20:26     ` Paulo Zanoni
2013-01-31 20:18   ` [Intel-gfx] " Paulo Zanoni
2013-01-30 18:24 ` [PATCH 3/9] drm/i915: Added SDP and VSC structures for handling PSR for eDP Rodrigo Vivi
2013-01-31  9:07   ` Jani Nikula
2013-01-30 18:24 ` Rodrigo Vivi [this message]
2013-01-31  9:12   ` [Intel-gfx] [PATCH 4/9] drm/i915: Read the EDP DPCD and PSR Capability Jani Nikula
2013-01-30 18:24 ` [PATCH 5/9] drm/i915: Setup EDP PSR AUX Registers Rodrigo Vivi
2013-01-31 10:17   ` Jani Nikula
2013-01-31 21:35   ` Paulo Zanoni
2013-01-30 18:24 ` [PATCH 6/9] drm/i915: VBT Parsing for the PSR Feature Block for HSW Rodrigo Vivi
2013-01-30 18:24 ` [PATCH 7/9] drm/i915: Enable/Disable PSR on HSW Rodrigo Vivi
2013-01-31 10:40   ` Jani Nikula
2013-01-31 22:01   ` Paulo Zanoni
2013-01-30 18:24 ` [PATCH 8/9] drm/i915: Added debugfs support for PSR Status Rodrigo Vivi
2013-01-31 10:48   ` Jani Nikula
2013-01-30 18:24 ` [PATCH 9/9] drm/i915: Hook PSR functionality Rodrigo Vivi
2013-01-31 10:50   ` [Intel-gfx] " Jani Nikula

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