From: Paulo Zanoni <przanoni@gmail.com>
To: intel-gfx@lists.freedesktop.org
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: [PATCH 11/8] drm/i915: rename some HDMI bit definitions
Date: Tue, 19 Feb 2013 16:21:47 -0300 [thread overview]
Message-ID: <1361301707-3967-3-git-send-email-przanoni@gmail.com> (raw)
In-Reply-To: <1361301707-3967-1-git-send-email-przanoni@gmail.com>
From: Paulo Zanoni <paulo.r.zanoni@intel.com>
Bits used only on HDMI mode now have HDMI_ prefix instead of SDVO_.
The COLOR_FORMAT bits now have prefixes (and the 12bpc bit is for HDMI
only).
Notice that this patch uncovers a bug on the SDVO code: the
COLOR_RANGE_16_235 bit can only be used if the port is in TMDS mode,
not SDVO mode. This will have to be fixed in a later patch.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 6 +++---
drivers/gpu/drm/i915/intel_hdmi.c | 8 ++++----
drivers/gpu/drm/i915/intel_sdvo.c | 8 ++++++--
3 files changed, 13 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index aad8eee..4c6bab7 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1717,19 +1717,19 @@
#define SDVOC_PRESERVE_MASK ((1 << 17) | SDVO_INTERRUPT_ENABLE)
/* Gen 4 SDVO/HDMI bits: */
-#define COLOR_FORMAT_8bpc (0 << 26)
+#define SDVO_COLOR_FORMAT_8bpc (0 << 26)
#define SDVO_ENCODING_SDVO (0 << 10)
#define SDVO_ENCODING_HDMI (2 << 10)
#define HDMI_MODE_SELECT_HDMI (1 << 9) /* HDMI only */
#define HDMI_MODE_SELECT_DVI (0 << 9) /* HDMI only */
-#define SDVO_COLOR_RANGE_16_235 (1 << 8) /* HDMI only */
+#define HDMI_COLOR_RANGE_16_235 (1 << 8) /* HDMI only */
#define SDVO_AUDIO_ENABLE (1 << 6)
/* VSYNC/HSYNC bits new with 965, default is to be set */
#define SDVO_VSYNC_ACTIVE_HIGH (1 << 4)
#define SDVO_HSYNC_ACTIVE_HIGH (1 << 3)
/* Gen 5 (IBX) SDVO/HDMI bits: */
-#define COLOR_FORMAT_12bpc (3 << 26) /* HDMI only */
+#define HDMI_COLOR_FORMAT_12bpc (3 << 26) /* HDMI only */
#define SDVOB_HOTPLUG_ENABLE (1 << 23) /* SDVO only */
/* Gen 6 (CPT) SDVO/HDMI bits: */
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index 4b953cf..c1b5809 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -608,9 +608,9 @@ static void intel_hdmi_mode_set(struct drm_encoder *encoder,
hdmi_val |= SDVO_HSYNC_ACTIVE_HIGH;
if (intel_crtc->bpp > 24)
- hdmi_val |= COLOR_FORMAT_12bpc;
+ hdmi_val |= HDMI_COLOR_FORMAT_12bpc;
else
- hdmi_val |= COLOR_FORMAT_8bpc;
+ hdmi_val |= SDVO_COLOR_FORMAT_8bpc;
/* Required on CPT */
if (intel_hdmi->has_hdmi_sink && HAS_PCH_CPT(dev))
@@ -777,7 +777,7 @@ bool intel_hdmi_mode_fixup(struct drm_encoder *encoder,
/* See CEA-861-E - 5.1 Default Encoding Parameters */
if (intel_hdmi->has_hdmi_sink &&
drm_mode_cea_vic(adjusted_mode) > 1)
- intel_hdmi->color_range = SDVO_COLOR_RANGE_16_235;
+ intel_hdmi->color_range = HDMI_COLOR_RANGE_16_235;
else
intel_hdmi->color_range = 0;
}
@@ -940,7 +940,7 @@ intel_hdmi_set_property(struct drm_connector *connector,
break;
case INTEL_BROADCAST_RGB_LIMITED:
intel_hdmi->color_range_auto = false;
- intel_hdmi->color_range = SDVO_COLOR_RANGE_16_235;
+ intel_hdmi->color_range = HDMI_COLOR_RANGE_16_235;
break;
default:
return -EINVAL;
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
index eef0731..63dcb76 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -1076,9 +1076,11 @@ static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
if (intel_sdvo->color_range_auto) {
/* See CEA-861-E - 5.1 Default Encoding Parameters */
+ /* FIXME: This bit is only valid when using TMDS encoding and 8
+ * bit per color mode. */
if (intel_sdvo->has_hdmi_monitor &&
drm_mode_cea_vic(adjusted_mode) > 1)
- intel_sdvo->color_range = SDVO_COLOR_RANGE_16_235;
+ intel_sdvo->color_range = HDMI_COLOR_RANGE_16_235;
else
intel_sdvo->color_range = 0;
}
@@ -1926,7 +1928,9 @@ intel_sdvo_set_property(struct drm_connector *connector,
break;
case INTEL_BROADCAST_RGB_LIMITED:
intel_sdvo->color_range_auto = false;
- intel_sdvo->color_range = SDVO_COLOR_RANGE_16_235;
+ /* FIXME: this bit is only valid when using TMDS
+ * encoding and 8 bit per color mode. */
+ intel_sdvo->color_range = HDMI_COLOR_RANGE_16_235;
break;
default:
return -EINVAL;
--
1.7.10.4
prev parent reply other threads:[~2013-02-19 19:22 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-02-18 22:00 [PATCH 0/8] Small refactorings v2 Paulo Zanoni
2013-02-18 22:00 ` [PATCH 1/8] drm/i915: create functions for the "unclaimed register" checks Paulo Zanoni
2013-02-18 22:00 ` [PATCH 2/8] drm/i915: use FPGA_DBG " Paulo Zanoni
2013-02-18 22:00 ` [PATCH 3/8] drm/i915: clear the FPGA_DBG_RM_NOCLAIM bit at driver init Paulo Zanoni
2013-02-19 9:32 ` Chris Wilson
2013-02-19 19:13 ` [PATCH 3/7] " Paulo Zanoni
2013-02-19 19:45 ` Daniel Vetter
2013-02-18 22:00 ` [PATCH 4/8] drm/i915: use HAS_DDI on intel_hdmi.c and intel_display.c Paulo Zanoni
2013-02-18 22:00 ` [PATCH 5/8] drm/i915: wait_event_timeout's timeout is in jiffies Paulo Zanoni
2013-03-03 17:36 ` Daniel Vetter
2013-02-18 22:00 ` [PATCH 6/8] drm/i915: add aux_ch_ctl_reg to struct intel_dp Paulo Zanoni
2013-02-18 22:00 ` [PATCH 7/8] drm/i915: rename sdvox_reg to hdmi_reg on HDMI context Paulo Zanoni
2013-02-19 11:47 ` Daniel Vetter
2013-02-18 22:00 ` [PATCH 8/8] drm/i915: clarify confusion between SDVO and HDMI registers Paulo Zanoni
2013-02-19 12:06 ` Daniel Vetter
2013-02-19 19:19 ` Paulo Zanoni
2013-03-04 22:28 ` Daniel Vetter
2013-02-19 19:21 ` [PATCH 9/8] drm/i915: unify the definitions of the HDMI/SDVO register Paulo Zanoni
2013-02-19 19:21 ` [PATCH 10/8] drm/i915: remove duplicated SDVO/HDMI bit definitions Paulo Zanoni
2013-02-19 19:21 ` Paulo Zanoni [this message]
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