From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jesse Barnes Subject: Updated fastboot bits Date: Tue, 2 Apr 2013 10:03:44 -0700 Message-ID: <1364922237-3620-1-git-send-email-jbarnes@virtuousgeek.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from oproxy12-pub.bluehost.com (oproxy12-pub.bluehost.com [50.87.16.10]) by gabe.freedesktop.org (Postfix) with SMTP id 06110E5C30 for ; Tue, 2 Apr 2013 10:04:21 -0700 (PDT) Received: from [67.161.37.189] (port=54872 helo=localhost.localdomain) by box514.bluehost.com with esmtpsa (TLSv1:CAMELLIA256-SHA:256) (Exim 4.80) (envelope-from ) id 1UN4dA-0006iJ-32 for intel-gfx@lists.freedesktop.org; Tue, 02 Apr 2013 11:04:20 -0600 List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org Still need to mash these into the pipe_config bits, but with the PCH PLL readout, at least they don't crash after DPMS anymore. So that patch may be ok to apply as-is; I think the main bits needing rework involve the mode readout checks in intel_fb.c. They belong in intel_display.c as part of the state readout into an adjusted_mode struct. Jesse