From mboxrd@z Thu Jan 1 00:00:00 1970 From: ville.syrjala@linux.intel.com Subject: [PATCH i-g-t 0/3] Fence register stuff Date: Tue, 9 Apr 2013 15:25:36 +0300 Message-ID: <1365510339-10576-1-git-send-email-ville.syrjala@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id C80C7E5BF0 for ; Tue, 9 Apr 2013 05:26:07 -0700 (PDT) List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org Some fence stuff related to the 32 fence registers/256KB max fence stride kernel changes. I'm not sure gem_tiling_max_stride does any good since you can only use it to verify that the tested fence stride <= max fence stride. Also I ran it only on ILK,SNB and IVB, so at least the Gen2-3 code is totally untested.