From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paulo Zanoni Subject: [PATCH 4/5] drm/i915: check the power well on i915_pipe_enabled Date: Fri, 3 May 2013 12:15:39 -0300 Message-ID: <1367594140-4339-4-git-send-email-przanoni@gmail.com> References: <1367594140-4339-1-git-send-email-przanoni@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-ve0-f172.google.com (mail-ve0-f172.google.com [209.85.128.172]) by gabe.freedesktop.org (Postfix) with ESMTP id 523B4E6562 for ; Fri, 3 May 2013 08:16:10 -0700 (PDT) Received: by mail-ve0-f172.google.com with SMTP id da11so1593390veb.31 for ; Fri, 03 May 2013 08:16:09 -0700 (PDT) In-Reply-To: <1367594140-4339-1-git-send-email-przanoni@gmail.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org Cc: Paulo Zanoni List-Id: intel-gfx@lists.freedesktop.org From: Paulo Zanoni This fixes "unclaimed register" messages when the power well is disabled and there's a GPU hang. v2: Use the new intel_display_power_enabled(). v3: Use the new domains for intel_display_power_enabled(). Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_irq.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 03a31be..161101f 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -384,6 +384,10 @@ i915_pipe_enabled(struct drm_device *dev, int pipe) enum transcoder cpu_transcoder = intel_pipe_to_cpu_transcoder(dev_priv, pipe); + if (!intel_display_power_enabled(dev, + POWER_DOMAIN_TRANSCODER(cpu_transcoder))) + return false; + return I915_READ(PIPECONF(cpu_transcoder)) & PIPECONF_ENABLE; } -- 1.7.10.4