From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rui Guo Subject: [PATCH] Fix PCH detect with multiple ISA bridges in VM Date: Wed, 19 Jun 2013 21:10:23 +0800 Message-ID: <1371647423-11272-1-git-send-email-firemeteor@users.sourceforge.net> References: Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-pa0-f46.google.com (mail-pa0-f46.google.com [209.85.220.46]) by gabe.freedesktop.org (Postfix) with ESMTP id 79D36E5D53 for ; Wed, 19 Jun 2013 06:11:10 -0700 (PDT) Received: by mail-pa0-f46.google.com with SMTP id fa11so5118020pad.5 for ; Wed, 19 Jun 2013 06:11:10 -0700 (PDT) In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Daniel Vetter Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org In some virtualized environments (e.g. XEN), there is irrelevant ISA bridge in the system. To work reliably, we should scan trhough all the ISA bridge devices and check for the first match, instead of only checking the first one. Signed-off-by: Rui Guo --- drivers/gpu/drm/i915/i915_drv.c | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index a2e4953..10316dc 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -454,9 +454,15 @@ void intel_detect_pch(struct drm_device *dev) * make graphics device passthrough work easy for VMM, that only * need to expose ISA bridge to let driver know the real hardware * underneath. This is a requirement from virtualization team. + * + * In some virtualized environments (e.g. XEN), there is irrelevant + * ISA bridge in the system. To work reliably, we should scan trhough + * all the ISA bridge devices and check for the first match, instead + * of only checking the first one. */ pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, NULL); - if (pch) { + while (pch) { + struct pci_dev *curr = pch; if (pch->vendor == PCI_VENDOR_ID_INTEL) { unsigned short id; id = pch->device & INTEL_PCH_DEVICE_ID_MASK; @@ -490,11 +496,20 @@ void intel_detect_pch(struct drm_device *dev) DRM_DEBUG_KMS("Found LynxPoint LP PCH\n"); WARN_ON(!IS_HASWELL(dev)); WARN_ON(!IS_ULT(dev)); + } else { + goto check_next; } + BUG_ON(dev_priv->num_pch_pll > I915_NUM_PLLS); + pci_dev_put(pch); + break; } - pci_dev_put(pch); +check_next: + pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, curr); + pci_dev_put(curr); } + if (!pch) + DRM_DEBUG_KMS("No PCH found?\n"); } bool i915_semaphore_is_enabled(struct drm_device *dev) -- 1.7.10.4