From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paulo Zanoni Subject: [PATCH 13/15] drm/i915: add INTEL_IRQ_REG_INIT16 Date: Tue, 23 Jul 2013 19:33:53 -0300 Message-ID: <1374618835-28120-14-git-send-email-przanoni@gmail.com> References: <1374618835-28120-1-git-send-email-przanoni@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-gh0-f175.google.com (mail-gh0-f175.google.com [209.85.160.175]) by gabe.freedesktop.org (Postfix) with ESMTP id 93B5AE66EA for ; Tue, 23 Jul 2013 15:35:09 -0700 (PDT) Received: by mail-gh0-f175.google.com with SMTP id z19so2709401ghb.34 for ; Tue, 23 Jul 2013 15:35:09 -0700 (PDT) In-Reply-To: <1374618835-28120-1-git-send-email-przanoni@gmail.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org Cc: Paulo Zanoni List-Id: intel-gfx@lists.freedesktop.org From: Paulo Zanoni Same thing as INTEL_IRQ_REG_INIT, but on a separate patch. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_irq.c | 22 ++++++++++++++-------- 1 file changed, 14 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index a936c59..d32042d 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -102,6 +102,14 @@ static const u32 hpd_status_i915[] = { /* i915 and valleyview are the same */ } \ } while (0) +#define INTEL_IRQ_REG_INIT16(type, do_iir, ier_val, imr_val) do { \ + if (do_iir) \ + I915_WRITE16(type##IR, I915_READ16(type##IR)); \ + I915_WRITE16(type##MR, (imr_val)); \ + I915_WRITE16(type##ER, (ier_val)); \ + POSTING_READ16(type##ER); \ +} while (0) + #define INTEL_IRQ_REG_INIT(type, do_iir, ier_val, imr_val) do { \ WARN(I915_READ(type##IR) != 0, "Register 0x%x is not 0\n", type##IR); \ I915_WRITE(type##MR, (imr_val)); \ @@ -2327,6 +2335,10 @@ static void i8xx_irq_preinstall(struct drm_device * dev) static int i8xx_irq_postinstall(struct drm_device *dev) { drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; + uint32_t enable_mask = (I915_DISPLAY_PIPE_A_EVENT_INTERRUPT | + I915_DISPLAY_PIPE_B_EVENT_INTERRUPT | + I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT | + I915_USER_INTERRUPT); I915_WRITE16(EMR, ~(I915_ERROR_PAGE_TABLE | I915_ERROR_MEMORY_REFRESH)); @@ -2338,14 +2350,8 @@ static int i8xx_irq_postinstall(struct drm_device *dev) I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT | I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT | I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT); - I915_WRITE16(IMR, dev_priv->irq_mask); - - I915_WRITE16(IER, - I915_DISPLAY_PIPE_A_EVENT_INTERRUPT | - I915_DISPLAY_PIPE_B_EVENT_INTERRUPT | - I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT | - I915_USER_INTERRUPT); - POSTING_READ16(IER); + + INTEL_IRQ_REG_INIT16(I, false, enable_mask, dev_priv->irq_mask); return 0; } -- 1.8.1.2