From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paulo Zanoni Subject: [PATCH 08/15] drm/i915: WARN if IIR is not zero at irq_postinstall Date: Tue, 23 Jul 2013 19:33:48 -0300 Message-ID: <1374618835-28120-9-git-send-email-przanoni@gmail.com> References: <1374618835-28120-1-git-send-email-przanoni@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-yh0-f42.google.com (mail-yh0-f42.google.com [209.85.213.42]) by gabe.freedesktop.org (Postfix) with ESMTP id ABA55E6121 for ; Tue, 23 Jul 2013 15:35:01 -0700 (PDT) Received: by mail-yh0-f42.google.com with SMTP id l109so615184yhq.29 for ; Tue, 23 Jul 2013 15:35:00 -0700 (PDT) In-Reply-To: <1374618835-28120-1-git-send-email-przanoni@gmail.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org Cc: Paulo Zanoni List-Id: intel-gfx@lists.freedesktop.org From: Paulo Zanoni Because now we're clearing the IIR register at preinstall and uninstall, so let's just check if it's still zero at postinstall. Since we should be disabling the interrupts at preinstall, there is no way the IIR could become non-zero at postinstall, so this patch may uncover bugs (e.g., missing code at preinstall). Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_irq.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 400aa63..6793b30 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -90,8 +90,7 @@ static const u32 hpd_status_i915[] = { /* i915 and valleyview are the same */ } while (0) #define INTEL_IRQ_REG_INIT(type, do_iir, ier_val, imr_val) do { \ - if (do_iir) \ - I915_WRITE(type##IR, I915_READ(type##IR)); \ + WARN(I915_READ(type##IR) != 0, "Register 0x%x is not 0\n", type##IR); \ I915_WRITE(type##MR, (imr_val)); \ I915_WRITE(type##ER, (ier_val)); \ POSTING_READ(type##ER); \ -- 1.8.1.2