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From: Paulo Zanoni <przanoni@gmail.com>
To: intel-gfx@lists.freedesktop.org
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: [PATCH 2/6] drm/i915: fix SDEIMR assertion when disabling LCPLL
Date: Mon, 19 Aug 2013 13:18:08 -0300	[thread overview]
Message-ID: <1376929092-3968-3-git-send-email-przanoni@gmail.com> (raw)
In-Reply-To: <1376929092-3968-1-git-send-email-przanoni@gmail.com>

From: Paulo Zanoni <paulo.r.zanoni@intel.com>

This was causing WARNs in one machine, so instead of trying to guess
exactly which hotplug bits should exist, just do the test on the
non-HPD bits. We don't care about the state of the hotplug bits, we
just care about the others, that need to be 1.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 8c63d8e..b9a4d8b 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5930,11 +5930,7 @@ static void assert_can_disable_lcpll(struct drm_i915_private *dev_priv)
 	struct intel_ddi_plls *plls = &dev_priv->ddi_plls;
 	struct intel_crtc *crtc;
 	unsigned long irqflags;
-	uint32_t val, pch_hpd_mask;
-
-	pch_hpd_mask = SDE_PORTB_HOTPLUG_CPT | SDE_PORTC_HOTPLUG_CPT;
-	if (!(dev_priv->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE))
-		pch_hpd_mask |= SDE_PORTD_HOTPLUG_CPT | SDE_CRT_HOTPLUG_CPT;
+	uint32_t val;
 
 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head)
 		WARN(crtc->base.enabled, "CRTC for pipe %c enabled\n",
@@ -5960,7 +5956,7 @@ static void assert_can_disable_lcpll(struct drm_i915_private *dev_priv)
 	WARN((val & ~DE_PCH_EVENT_IVB) != val,
 	     "Unexpected DEIMR bits enabled: 0x%x\n", val);
 	val = I915_READ(SDEIMR);
-	WARN((val & ~pch_hpd_mask) != val,
+	WARN((val | SDE_HOTPLUG_MASK_CPT) != 0xffffffff,
 	     "Unexpected SDEIMR bits enabled: 0x%x\n", val);
 	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
 }
-- 
1.8.1.2

  parent reply	other threads:[~2013-08-19 16:18 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-08-19 16:18 [PATCH 0/6] Final PC8+ patches Paulo Zanoni
2013-08-19 16:18 ` [PATCH 1/6] drm/i915: grab force_wake when restoring LCPLL Paulo Zanoni
2013-08-19 18:25   ` Chris Wilson
2013-08-19 19:01     ` Paulo Zanoni
2013-08-19 22:53       ` Ben Widawsky
2013-08-20 14:27         ` Paulo Zanoni
2013-08-19 16:18 ` Paulo Zanoni [this message]
2013-08-21 15:37   ` [PATCH 2/6] drm/i915: fix SDEIMR assertion when disabling LCPLL Rodrigo Vivi
2013-08-19 16:18 ` [PATCH 3/6] drm/i915: allow package C8+ states on Haswell (disabled) Paulo Zanoni
2013-08-19 18:29   ` Chris Wilson
2013-08-19 16:18 ` [PATCH 4/6] drm/i915: add i915_pc8_status debugfs file Paulo Zanoni
2013-08-21 15:42   ` Rodrigo Vivi
2013-08-19 16:18 ` [PATCH 5/6] drm/i915: add i915.pc8_timeout function Paulo Zanoni
2013-08-21 15:43   ` Rodrigo Vivi
2013-08-19 16:18 ` [PATCH 6/6] drm/i915: enable Package C8+ by default Paulo Zanoni
2013-08-21 15:43   ` Rodrigo Vivi
2013-08-22 14:13     ` Daniel Vetter
2013-08-19 16:20 ` [PATCH igt] tests: add pc8 Paulo Zanoni
2013-08-20 20:18   ` Daniel Vetter

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