From: Ben Widawsky <benjamin.widawsky@intel.com>
To: Intel GFX <intel-gfx@lists.freedesktop.org>
Cc: Ben Widawsky <ben@bwidawsk.net>,
Ben Widawsky <benjamin.widawsky@intel.com>
Subject: [PATCH 1/2] drm/i915: Update plane flip count registers
Date: Wed, 21 Aug 2013 20:15:52 -0700 [thread overview]
Message-ID: <1377141353-11532-1-git-send-email-benjamin.widawsky@intel.com> (raw)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
drivers/gpu/drm/i915/i915_reg.h | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 53d0e70..d1079db 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3277,7 +3277,6 @@
#define PIPE_PIXEL_SHIFT 0
/* GM45+ just has to be different */
#define _PIPEA_FRMCOUNT_GM45 0x70040
-#define _PIPEA_FLIPCOUNT_GM45 0x70044
#define PIPE_FRMCOUNT_GM45(pipe) _PIPE(pipe, _PIPEA_FRMCOUNT_GM45, _PIPEB_FRMCOUNT_GM45)
/* Cursor A & B regs */
@@ -3361,6 +3360,7 @@
#define DISPPLANE_STEREO_POLARITY_SECOND (1<<18)
#define DISPPLANE_TRICKLE_FEED_DISABLE (1<<14) /* Ironlake */
#define DISPPLANE_TILED (1<<10)
+#define _DSPAFLIPCNT (dev_priv->info->display_mmio_offset + 0x70044)
#define _DSPAADDR (dev_priv->info->display_mmio_offset + 0x70184)
#define _DSPASTRIDE (dev_priv->info->display_mmio_offset + 0x70188)
#define _DSPAPOS (dev_priv->info->display_mmio_offset + 0x7018C) /* reserved */
@@ -3380,6 +3380,7 @@
#define DSPLINOFF(plane) DSPADDR(plane)
#define DSPOFFSET(plane) _PIPE(plane, _DSPAOFFSET, _DSPBOFFSET)
#define DSPSURFLIVE(plane) _PIPE(plane, _DSPASURFLIVE, _DSPBSURFLIVE)
+#define DSPFLIPCNT(plane) _PIPE(plane, _DSPAFLIPCNT, _DSPBFLIPCNT)
/* Display/Sprite base address macros */
#define DISP_BASEADDR_MASK (0xfffff000)
@@ -3410,10 +3411,11 @@
#define _PIPEBFRAMEHIGH (dev_priv->info->display_mmio_offset + 0x71040)
#define _PIPEBFRAMEPIXEL (dev_priv->info->display_mmio_offset + 0x71044)
#define _PIPEB_FRMCOUNT_GM45 0x71040
-#define _PIPEB_FLIPCOUNT_GM45 0x71044
+#define _PIPEB_FLIPCOUNT (dev_priv->info->display_mmio_offset + 0x71044
/* Display B control */
+#define _DSPBFLIPCNT (dev_priv->info->display_mmio_offset + 0x71044)
#define _DSPBCNTR (dev_priv->info->display_mmio_offset + 0x71180)
#define DISPPLANE_ALPHA_TRANS_ENABLE (1<<15)
#define DISPPLANE_ALPHA_TRANS_DISABLE 0
--
1.8.3.4
next reply other threads:[~2013-08-22 2:14 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-08-22 3:15 Ben Widawsky [this message]
2013-08-22 3:15 ` [PATCH 2/2] drm/i915: Add debugfs interface for planes Ben Widawsky
2013-08-22 2:16 ` Ben Widawsky
2013-08-22 2:21 ` Chris Wilson
2013-08-22 2:27 ` Ben Widawsky
2013-08-22 2:32 ` Chris Wilson
2013-08-22 3:23 ` [PATCH 2/2] [v2] " Ben Widawsky
2013-08-22 17:18 ` [PATCH 1/2] drm/i915: Update plane flip count registers Ville Syrjälä
2013-08-22 18:12 ` Ben Widawsky
2013-08-22 18:25 ` Ville Syrjälä
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