[PATCH 1/7] intel_reg_dumper: Silence GCC for uninitialized clock

[PATCH 1/7] intel_reg_dumper: Silence GCC for uninitialized clock

[Ben Widawsky]

GCC 4.8.1 seems to think clock may be uninitialized.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
 tools/intel_reg_dumper.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/intel_reg_dumper.c b/tools/intel_reg_dumper.c
index bf3452c..1f4e877 100644
--- a/tools/intel_reg_dumper.c
+++ b/tools/intel_reg_dumper.c
@@ -1573,7 +1573,7 @@ DEBUGSTRING(ilk_debug_pp_control)
 
 DEBUGSTRING(hsw_debug_port_clk_sel)
 {
-	const char *clock;
+	const char *clock = NULL;
 
 	switch ((val >> 29 ) & 7) {
 	case 0:
-- 
1.8.4

[PATCH 2/7] gem_vmap_blits: Demote warning to note

[Ben Widawsky]

The warning that vmap isn't supported is useful, but it shouldn't get in
the way of developers (or distros) being able to use -Werror.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
 tests/gem_vmap_blits.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tests/gem_vmap_blits.c b/tests/gem_vmap_blits.c
index c09bcfc..3e8e458 100644
--- a/tests/gem_vmap_blits.c
+++ b/tests/gem_vmap_blits.c
@@ -51,7 +51,7 @@
 #include "intel_gpu_tools.h"
 
 #if !defined(I915_PARAM_HAS_VMAP)
-#warning No vmap support in drm, skipping
+#pragma message("No vmap support in drm, skipping")
 int main(int argc, char **argv)
 {
 	fprintf(stderr, "No vmap support in drm.\n");
-- 
1.8.4

[PATCH 3/7] tools/Makefile.am: use -Werror

[Ben Widawsky]

Our tools should always compile without warnings. We use them to get
debug output from end users, and ignoring warnings could be detrimental.
Tests are a different matter.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
 tools/Makefile.am | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/Makefile.am b/tools/Makefile.am
index 47bd5b3..13cc03a 100644
--- a/tools/Makefile.am
+++ b/tools/Makefile.am
@@ -38,7 +38,7 @@ noinst_PROGRAMS = 			\
 dist_bin_SCRIPTS = intel_gpu_abrt
 
 AM_CPPFLAGS = -I$(top_srcdir) -I$(top_srcdir)/lib
-AM_CFLAGS = $(DRM_CFLAGS) $(PCIACCESS_CFLAGS) $(CWARNFLAGS) $(CAIRO_CFLAGS)
+AM_CFLAGS = $(DRM_CFLAGS) $(PCIACCESS_CFLAGS) $(CWARNFLAGS) $(CAIRO_CFLAGS) -Werror
 LDADD = $(top_builddir)/lib/libintel_tools.la $(DRM_LIBS) $(PCIACCESS_LIBS) $(CAIRO_LIBS)
 
 intel_dump_decode_SOURCES = 	\
-- 
1.8.4

[PATCH 4/7] intel_gtt: Use function to get the physical address

[Ben Widawsky]

The GTT PTEs that the tool is trying to compare is really about
addresses, and not the PTE itself. To accomplish this, make which
calculates the physical address we actually want.

This commit itself doesn't change any functionality; just the wording in
the code.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
 tools/intel_gtt.c | 26 +++++++++++++++-----------
 1 file changed, 15 insertions(+), 11 deletions(-)

diff --git a/tools/intel_gtt.c b/tools/intel_gtt.c
index 7885610..32a6618 100644
--- a/tools/intel_gtt.c
+++ b/tools/intel_gtt.c
@@ -34,16 +34,20 @@
 
 #include "intel_gpu_tools.h"
 
-#define INGTT(offset) (*(volatile uint32_t *)(gtt + (offset) / (KB(4) / 4)))
-
 #define KB(x) ((x) * 1024)
 #define MB(x) ((x) * 1024 * 1024)
+unsigned char *gtt;
+
+#define INGTT(offset) (*(volatile uint32_t *)(gtt + (offset) / (KB(4) / 4)))
+static uint64_t get_phys(uint32_t pt_offset)
+{
+	return INGTT(pt_offset);
+}
 
 int main(int argc, char **argv)
 {
 	struct pci_device *pci_dev;
 	int start, aper_size;
-	unsigned char *gtt;
 	uint32_t devid;
 	int flag[] = {
 		PCI_DEV_MAP_FLAG_WRITE_COMBINE,
@@ -90,15 +94,15 @@ int main(int argc, char **argv)
 	aper_size = pci_dev->regions[2].size;
 
 	for (start = 0; start < aper_size; start += KB(4)) {
-		uint32_t start_pte = INGTT(start);
+		uint32_t start_phys = INGTT(start);
 		uint32_t end;
 		int constant_length = 0;
 		int linear_length = 0;
 
 		/* Check if it's a linear sequence */
 		for (end = start + KB(4); end < aper_size; end += KB(4)) {
-			uint32_t end_pte = INGTT(end);
-			if (end_pte == start_pte + (end - start))
+			uint32_t end_phys = INGTT(end);
+			if (end_phys == start_phys + (end - start))
 				linear_length++;
 			else
 				break;
@@ -107,27 +111,27 @@ int main(int argc, char **argv)
 			printf("0x%08x - 0x%08x: linear from "
 			       "0x%08x to 0x%08x\n",
 			       start, end - KB(4),
-			       start_pte, start_pte + (end - start) - KB(4));
+			       start_phys, start_phys + (end - start) - KB(4));
 			start = end - KB(4);
 			continue;
 		}
 
 		/* Check if it's a constant sequence */
 		for (end = start + KB(4); end < aper_size; end += KB(4)) {
-			uint32_t end_pte = INGTT(end);
-			if (end_pte == start_pte)
+			uint32_t end_phys = INGTT(end);
+			if (end_phys == start_phys)
 				constant_length++;
 			else
 				break;
 		}
 		if (constant_length > 0) {
 			printf("0x%08x - 0x%08x: constant 0x%08x\n",
-			       start, end - KB(4), start_pte);
+			       start, end - KB(4), start_phys);
 			start = end - KB(4);
 			continue;
 		}
 
-		printf("0x%08x: 0x%08x\n", start, start_pte);
+		printf("0x%08x: 0x%08x\n", start, start_phys);
 	}
 
 	return 0;
-- 
1.8.4

[PATCH 5/7] intel_gtt: Properly support gen6+ GTT PTEs

[Ben Widawsky]

This finishes the objective in the last patch which was to actually deal
with physical addresses, and not the PTEs.

GEN6+ Provided support for physical addresses above 4GB. I'm not
actually sure what Ironlake supported, and don't feel like firing up the
timemachine.

Haswell caveat is coming up next.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
 tools/intel_gtt.c | 26 ++++++++++++++++++--------
 1 file changed, 18 insertions(+), 8 deletions(-)

diff --git a/tools/intel_gtt.c b/tools/intel_gtt.c
index 32a6618..874a4f6 100644
--- a/tools/intel_gtt.c
+++ b/tools/intel_gtt.c
@@ -25,6 +25,8 @@
  *
  */
 
+#define __STDC_FORMAT_MACROS
+#include <inttypes.h>
 #include <stdio.h>
 #include <stdlib.h>
 #include <string.h>
@@ -37,18 +39,26 @@
 #define KB(x) ((x) * 1024)
 #define MB(x) ((x) * 1024 * 1024)
 unsigned char *gtt;
+uint32_t devid;
 
 #define INGTT(offset) (*(volatile uint32_t *)(gtt + (offset) / (KB(4) / 4)))
 static uint64_t get_phys(uint32_t pt_offset)
 {
-	return INGTT(pt_offset);
+	uint64_t pae = 0;
+	uint64_t phys = INGTT(pt_offset);
+
+	if (intel_gen(devid) < 6)
+		return phys;
+
+	pae = (phys & 0xff0) << 28;
+
+	return (phys | pae) & ~0xfff;
 }
 
 int main(int argc, char **argv)
 {
 	struct pci_device *pci_dev;
 	int start, aper_size;
-	uint32_t devid;
 	int flag[] = {
 		PCI_DEV_MAP_FLAG_WRITE_COMBINE,
 		PCI_DEV_MAP_FLAG_WRITABLE,
@@ -94,14 +104,14 @@ int main(int argc, char **argv)
 	aper_size = pci_dev->regions[2].size;
 
 	for (start = 0; start < aper_size; start += KB(4)) {
-		uint32_t start_phys = INGTT(start);
+		uint64_t start_phys = get_phys(start);
 		uint32_t end;
 		int constant_length = 0;
 		int linear_length = 0;
 
 		/* Check if it's a linear sequence */
 		for (end = start + KB(4); end < aper_size; end += KB(4)) {
-			uint32_t end_phys = INGTT(end);
+			uint64_t end_phys = get_phys(end);
 			if (end_phys == start_phys + (end - start))
 				linear_length++;
 			else
@@ -109,7 +119,7 @@ int main(int argc, char **argv)
 		}
 		if (linear_length > 0) {
 			printf("0x%08x - 0x%08x: linear from "
-			       "0x%08x to 0x%08x\n",
+			       "0x%" PRIx64 " to 0x%" PRIx64 "\n",
 			       start, end - KB(4),
 			       start_phys, start_phys + (end - start) - KB(4));
 			start = end - KB(4);
@@ -118,20 +128,20 @@ int main(int argc, char **argv)
 
 		/* Check if it's a constant sequence */
 		for (end = start + KB(4); end < aper_size; end += KB(4)) {
-			uint32_t end_phys = INGTT(end);
+			uint64_t end_phys = get_phys(end);
 			if (end_phys == start_phys)
 				constant_length++;
 			else
 				break;
 		}
 		if (constant_length > 0) {
-			printf("0x%08x - 0x%08x: constant 0x%08x\n",
+			printf("0x%08x - 0x%08x: constant 0x%" PRIx64 "\n",
 			       start, end - KB(4), start_phys);
 			start = end - KB(4);
 			continue;
 		}
 
-		printf("0x%08x: 0x%08x\n", start, start_phys);
+		printf("0x%08x: 0x%" PRIx64 "\n", start, start_phys);
 	}
 
 	return 0;
-- 
1.8.4

[PATCH 6/7] intel_gtt: Support HSW PTEs

[Ben Widawsky]

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
 tools/intel_gtt.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/tools/intel_gtt.c b/tools/intel_gtt.c
index 874a4f6..acf63c1 100644
--- a/tools/intel_gtt.c
+++ b/tools/intel_gtt.c
@@ -50,7 +50,10 @@ static uint64_t get_phys(uint32_t pt_offset)
 	if (intel_gen(devid) < 6)
 		return phys;
 
-	pae = (phys & 0xff0) << 28;
+	if (IS_HASWELL(devid))
+		pae = (phys & 0x7f0) << 28;
+	else
+		pae = (phys & 0xff0) << 28;
 
 	return (phys | pae) & ~0xfff;
 }
-- 
1.8.4

[PATCH 7/7] intel_gtt: Raw PTE dumper mode

[Ben Widawsky]

./tools/intel_gtt -d | head
GTT offset |                 PTEs
--------------------------------------------------------
  0x000000 | 0xe4005015 0xe2854015 0xe283e015 0xe283f015
  0x004000 | 0xe28ba015 0xe28bb015 0xe28b6015 0xe28b7015
  0x008000 | 0xe2828015 0xe2829015 0xe282a015 0xe282b015
  0x00c000 | 0xe2928015 0xe2929015 0xe292a015 0xe292b015
  0x010000 | 0xe2918015 0xe2919015 0xe291a015 0xe291b015
  0x014000 | 0xe291c015 0xe291d015 0xe291e015 0xe291f015
  0x018000 | 0xe2920015 0xe2921015 0xe2922015 0xe2923015
  0x01c000 | 0xe2924015 0xe2925015 0xe2926015 0xe2927015

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
 tools/intel_gtt.c | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)

diff --git a/tools/intel_gtt.c b/tools/intel_gtt.c
index acf63c1..090e88d 100644
--- a/tools/intel_gtt.c
+++ b/tools/intel_gtt.c
@@ -58,6 +58,25 @@ static uint64_t get_phys(uint32_t pt_offset)
 	return (phys | pae) & ~0xfff;
 }
 
+static void pte_dump(int size, uint32_t offset) {
+	int start;
+	/* Want to print 4 ptes at a time (4b PTE assumed). */
+	if (size % 16)
+		size = (size + 16) & ~0xffff;
+
+
+	printf("GTT offset |                 PTEs\n");
+	printf("--------------------------------------------------------\n");
+	for (start = 0; start < size; start += KB(16)) {
+		printf("  0x%06x | 0x%08x 0x%08x 0x%08x 0x%08x\n",
+				start,
+				INGTT(start + 0x0),
+				INGTT(start + 0x1000),
+				INGTT(start + 0x2000),
+				INGTT(start + 0x3000));
+	}
+}
+
 int main(int argc, char **argv)
 {
 	struct pci_device *pci_dev;
@@ -105,6 +124,10 @@ int main(int argc, char **argv)
 	}
 
 	aper_size = pci_dev->regions[2].size;
+	if (argc > 1 && !strncmp("-d", argv[1], 2)) {
+		pte_dump(aper_size, 0);
+		return 0;
+	}
 
 	for (start = 0; start < aper_size; start += KB(4)) {
 		uint64_t start_phys = get_phys(start);
-- 
1.8.4

Re: [PATCH 5/7] intel_gtt: Properly support gen6+ GTT PTEs

[Daniel Vetter]

On Sun, Sep 01, 2013 at 12:51:24PM -0700, Ben Widawsky wrote:
> This finishes the objective in the last patch which was to actually deal
> with physical addresses, and not the PTEs.
> 
> GEN6+ Provided support for physical addresses above 4GB. I'm not
> actually sure what Ironlake supported, and don't feel like firing up the
> timemachine.
> 
> Haswell caveat is coming up next.
> 
> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

gen4/5 and pnv/g33 simply have

+	pae = (phys & 0xf0) << 28;
+
+	return (phys | pae) & ~0xfff;

Cheers, Daniel


> ---
>  tools/intel_gtt.c | 26 ++++++++++++++++++--------
>  1 file changed, 18 insertions(+), 8 deletions(-)
> 
> diff --git a/tools/intel_gtt.c b/tools/intel_gtt.c
> index 32a6618..874a4f6 100644
> --- a/tools/intel_gtt.c
> +++ b/tools/intel_gtt.c
> @@ -25,6 +25,8 @@
>   *
>   */
>  
> +#define __STDC_FORMAT_MACROS
> +#include <inttypes.h>
>  #include <stdio.h>
>  #include <stdlib.h>
>  #include <string.h>
> @@ -37,18 +39,26 @@
>  #define KB(x) ((x) * 1024)
>  #define MB(x) ((x) * 1024 * 1024)
>  unsigned char *gtt;
> +uint32_t devid;
>  
>  #define INGTT(offset) (*(volatile uint32_t *)(gtt + (offset) / (KB(4) / 4)))
>  static uint64_t get_phys(uint32_t pt_offset)
>  {
> -	return INGTT(pt_offset);
> +	uint64_t pae = 0;
> +	uint64_t phys = INGTT(pt_offset);
> +
> +	if (intel_gen(devid) < 6)
> +		return phys;
> +
> +	pae = (phys & 0xff0) << 28;
> +
> +	return (phys | pae) & ~0xfff;
>  }
>  
>  int main(int argc, char **argv)
>  {
>  	struct pci_device *pci_dev;
>  	int start, aper_size;
> -	uint32_t devid;
>  	int flag[] = {
>  		PCI_DEV_MAP_FLAG_WRITE_COMBINE,
>  		PCI_DEV_MAP_FLAG_WRITABLE,
> @@ -94,14 +104,14 @@ int main(int argc, char **argv)
>  	aper_size = pci_dev->regions[2].size;
>  
>  	for (start = 0; start < aper_size; start += KB(4)) {
> -		uint32_t start_phys = INGTT(start);
> +		uint64_t start_phys = get_phys(start);
>  		uint32_t end;
>  		int constant_length = 0;
>  		int linear_length = 0;
>  
>  		/* Check if it's a linear sequence */
>  		for (end = start + KB(4); end < aper_size; end += KB(4)) {
> -			uint32_t end_phys = INGTT(end);
> +			uint64_t end_phys = get_phys(end);
>  			if (end_phys == start_phys + (end - start))
>  				linear_length++;
>  			else
> @@ -109,7 +119,7 @@ int main(int argc, char **argv)
>  		}
>  		if (linear_length > 0) {
>  			printf("0x%08x - 0x%08x: linear from "
> -			       "0x%08x to 0x%08x\n",
> +			       "0x%" PRIx64 " to 0x%" PRIx64 "\n",
>  			       start, end - KB(4),
>  			       start_phys, start_phys + (end - start) - KB(4));
>  			start = end - KB(4);
> @@ -118,20 +128,20 @@ int main(int argc, char **argv)
>  
>  		/* Check if it's a constant sequence */
>  		for (end = start + KB(4); end < aper_size; end += KB(4)) {
> -			uint32_t end_phys = INGTT(end);
> +			uint64_t end_phys = get_phys(end);
>  			if (end_phys == start_phys)
>  				constant_length++;
>  			else
>  				break;
>  		}
>  		if (constant_length > 0) {
> -			printf("0x%08x - 0x%08x: constant 0x%08x\n",
> +			printf("0x%08x - 0x%08x: constant 0x%" PRIx64 "\n",
>  			       start, end - KB(4), start_phys);
>  			start = end - KB(4);
>  			continue;
>  		}
>  
> -		printf("0x%08x: 0x%08x\n", start, start_phys);
> +		printf("0x%08x: 0x%" PRIx64 "\n", start, start_phys);
>  	}
>  
>  	return 0;
> -- 
> 1.8.4
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch