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From: Ben Widawsky <benjamin.widawsky@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: bryan.j.bell@intel.com,
	Ben Widawsky <benjamin.widawsky@intel.com>,
	Ben Widawsky <ben@bwidawsk.net>,
	vishnu.venkatesh@intel.com
Subject: [PATCH 12/16] intel_l3_parity: Hardware info argument
Date: Thu, 12 Sep 2013 22:28:38 -0700	[thread overview]
Message-ID: <1379050122-12774-13-git-send-email-benjamin.widawsky@intel.com> (raw)
In-Reply-To: <1379050122-12774-1-git-send-email-benjamin.widawsky@intel.com>

Add a new command line argument to the tool which will spit out various
parameters for the giving hardware. As a result of this, some new
defines are added to help with the various info.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
 tools/intel_l3_parity.c | 24 ++++++++++++++++++++----
 1 file changed, 20 insertions(+), 4 deletions(-)

diff --git a/tools/intel_l3_parity.c b/tools/intel_l3_parity.c
index fa5adaa..5031fbd 100644
--- a/tools/intel_l3_parity.c
+++ b/tools/intel_l3_parity.c
@@ -38,9 +38,19 @@
 #include "intel_gpu_tools.h"
 #include "drmtest.h"
 
-#define NUM_BANKS 4
+static unsigned int devid;
+/* L3 size is always a function of banks. The number of banks cannot be
+ * determined by number of slices however */
+#define MAX_BANKS 4
+#define NUM_BANKS \
+	((devid == PCI_CHIP_IVYBRIDGE_GT1 || devid == PCI_CHIP_IVYBRIDGE_M_GT1) ? 2 : 4)
 #define NUM_SUBBANKS 8
+#define BYTES_PER_BANK (128 << 10)
+/* Each row addresses [up to] 4b. This multiplied by the number of subbanks
+ * will give the L3 size per bank.
+ * TODO: Row size is fixed on IVB, and variable on HSW.*/
 #define MAX_ROW (1<<12)
+#define L3_SIZE ((MAX_ROW * 4) * NUM_SUBBANKS *  NUM_BANKS)
 #define NUM_REGS (NUM_BANKS * NUM_SUBBANKS)
 
 struct __attribute__ ((__packed__)) l3_log_register {
@@ -50,7 +60,7 @@ struct __attribute__ ((__packed__)) l3_log_register {
 	uint32_t row1_enable	: 1;
 	uint32_t rsvd1		: 4;
 	uint32_t row1		: 11;
-} l3log[NUM_BANKS][NUM_SUBBANKS];
+} l3log[MAX_BANKS][NUM_SUBBANKS];
 
 static void dumpit(void)
 {
@@ -118,6 +128,7 @@ static void usage(const char *name)
 		"  -s, --subbank=[subbank]		The subbank to act upon (default 0)\n"
 		" ACTIONS (only 1 may be specified at a time):\n"
 		"  -h, --help				Display this help\n"
+		"  -H, --hw-info				Display the current L3 properties\n"
 		"  -l, --list				List the current L3 logs\n"
 		"  -a, --clear-all			Clear all disabled rows\n"
 		"  -e, --enable				Enable row, bank, subbank (undo -d)\n"
@@ -129,7 +140,6 @@ int main(int argc, char *argv[])
 {
 	const int device = drm_get_card();
 	char *path;
-	unsigned int devid;
 	int row = 0, bank = 0, sbank = 0;
 	int drm_fd, fd, ret;
 	int action = '0';
@@ -163,13 +173,14 @@ int main(int argc, char *argv[])
 			{ "clear-all", no_argument, 0, 'a' },
 			{ "enable", no_argument, 0, 'e' },
 			{ "disable", optional_argument, 0, 'd' },
+			{ "hw-info", no_argument, 0, 'H' },
 			{ "row", required_argument, 0, 'r' },
 			{ "bank", required_argument, 0, 'b' },
 			{ "subbank", required_argument, 0, 's' },
 			{0, 0, 0, 0}
 		};
 
-		c = getopt_long(argc, argv, "hr:b:s:aled::", long_options,
+		c = getopt_long(argc, argv, "hHr:b:s:aled::", long_options,
 				&option_index);
 		if (c == -1)
 			break;
@@ -179,6 +190,11 @@ int main(int argc, char *argv[])
 			case 'h':
 				usage(argv[0]);
 				exit(EXIT_SUCCESS);
+			case 'H':
+				printf("Number of banks: %d\n", NUM_BANKS);
+				printf("Subbanks per bank: %d\n", NUM_SUBBANKS);
+				printf("L3 size: %dK\n", L3_SIZE >> 10);
+				exit(EXIT_SUCCESS);
 			case 'r':
 				row = atoi(optarg);
 				if (row >= MAX_ROW)
-- 
1.8.4

  parent reply	other threads:[~2013-09-13  5:29 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-09-13  5:28 [PATCH 0/8] DPF (GPU l3 parity detection) improvements Ben Widawsky
2013-09-13  5:28 ` [PATCH 1/8] drm/i915: Remove extra "ring" Ben Widawsky
2013-09-13  5:28 ` [PATCH 2/8] drm/i915: Round l3 parity reads down Ben Widawsky
2013-09-13  5:28 ` [PATCH 3/8] drm/i915: Fix l3 parity user buffer offset Ben Widawsky
2013-09-13 12:56   ` Daniel Vetter
2013-09-13  5:28 ` [PATCH 4/8] drm/i915: Fix HSW parity test Ben Widawsky
2013-09-13  8:17   ` Ville Syrjälä
2013-09-13  5:28 ` [PATCH 5/8] drm/i915: Add second slice l3 remapping Ben Widawsky
2013-09-13  9:38   ` Ville Syrjälä
2013-09-17 18:45     ` Ben Widawsky
2013-09-17 18:51       ` Bell, Bryan J
2013-09-17 19:02         ` Ville Syrjälä
2013-09-17 19:08           ` Bell, Bryan J
2013-09-13  5:28 ` [PATCH 6/8] drm/i915: Make l3 remapping use the ring Ben Widawsky
2013-09-13 16:16   ` Daniel Vetter
2013-09-13  5:28 ` [PATCH 7/8] drm/i915: Keep a list of all contexts Ben Widawsky
2013-09-13  5:28 ` [PATCH 8/8] drm/i915: Do remaps for " Ben Widawsky
2013-09-13  9:17   ` Ville Syrjälä
2013-09-13  9:20     ` Ville Syrjälä
2013-09-17 20:42     ` Ben Widawsky
2013-09-13  5:28 ` [PATCH 09/16] intel_l3_parity: Fix indentation Ben Widawsky
2013-09-13  5:28 ` [PATCH 10/16] intel_l3_parity: Assert all GEN7+ support Ben Widawsky
2013-09-16 18:18   ` Bell, Bryan J
2013-09-17 23:52     ` Ben Widawsky
2013-09-17 23:59       ` Ben Widawsky
2013-09-13  5:28 ` [PATCH 11/16] intel_l3_parity: Use getopt for the l3 parity tool Ben Widawsky
2013-09-13  5:28 ` Ben Widawsky [this message]
2013-09-13  5:28 ` [PATCH 13/16] intel_l3_parity: slice support Ben Widawsky
2013-09-13  5:28 ` [PATCH 14/16] intel_l3_parity: Actually support multiple slices Ben Widawsky
2013-09-13  5:28 ` [PATCH 15/16] intel_l3_parity: Support error injection Ben Widawsky
2013-09-13  9:12   ` Daniel Vetter
2013-09-13 15:54     ` Ben Widawsky
2013-09-13 16:14       ` Daniel Vetter
2013-09-13 16:29         ` Ben Widawsky
2013-09-13  5:28 ` [PATCH 16/16] intel_l3_parity: Support a daemonic mode Ben Widawsky
2013-09-13  9:44 ` [PATCH 0/8] DPF (GPU l3 parity detection) improvements Ville Syrjälä
2013-09-17  0:52 ` Bell, Bryan J
2013-09-17  4:15   ` Ben Widawsky
2013-09-17  7:27     ` Daniel Vetter
2013-09-17 18:23       ` Bell, Bryan J

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