Re: [PATCH 0/8] DPF (GPU l3 parity detection) improvements

Daniel Vetter
2013-09-17T07:27:50Z

On Tue, Sep 17, 2013 at 6:15 AM, Ben Widawsky
<benjamin.widawsky@intel.com> wrote:
> I see. I had thought the hang bit was part of the test injection, when
> it's actually modifying the behavior or L3 errors. Any opinions on
> what the default should be (agreed that policy should be controlled by
> user space, but we can control the default)? What does a "hang" mean
> exactly, is the rest of memory still responsive, L3?

I guess we want a hang-on-L3-error bit at context creation. But that
seems orthogonal to fixing l3 error reporting on hsw and wiring up the
test facilities, so I'd wait until someone screams for this.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch