[PATCH 1/2] drm/i915: WARN is the DP aux read or write is too big

[PATCH 1/2] drm/i915: WARN is the DP aux read or write is too big

[Paulo Zanoni]

From: Paulo Zanoni <paulo.r.zanoni@intel.com>

So far we control everything and nothing exceeds the current limits,
but (i) we never think about these limits when reviewing patches, (ii)
not all the callers check the return values and (iii) if we ever hit
any of these messages, we'll have to fix the code that added the bad
message.

The current limit for these messages is 20 since we only have 5 data
registers on all the current gens.

The checks inside intel_dp_aux_native_{write,read} are to prevent
buffer overflows. The check inside intel_dp_aux_ch is to prevent
writing past our 5 data registers.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c | 14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 8c70a83..c324a59 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -436,6 +436,12 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
 		goto out;
 	}
 
+	/* Only 5 data registers! */
+	if (WARN_ON(send_bytes > 20 || recv_size > 20)) {
+		ret = -E2BIG;
+		goto out;
+	}
+
 	while ((aux_clock_divider = get_aux_clock_divider(intel_dp, clock++))) {
 		/* Must try at least 3 times according to DP spec */
 		for (try = 0; try < 5; try++) {
@@ -526,9 +532,10 @@ intel_dp_aux_native_write(struct intel_dp *intel_dp,
 	int msg_bytes;
 	uint8_t	ack;
 
+	if (WARN_ON(send_bytes > 16))
+		return -E2BIG;
+
 	intel_dp_check_edp(intel_dp);
-	if (send_bytes > 16)
-		return -1;
 	msg[0] = AUX_NATIVE_WRITE << 4;
 	msg[1] = address >> 8;
 	msg[2] = address & 0xff;
@@ -569,6 +576,9 @@ intel_dp_aux_native_read(struct intel_dp *intel_dp,
 	uint8_t ack;
 	int ret;
 
+	if (WARN_ON(recv_bytes > 19))
+		return -E2BIG;
+
 	intel_dp_check_edp(intel_dp);
 	msg[0] = AUX_NATIVE_READ << 4;
 	msg[1] = address >> 8;
-- 
1.8.3.1

[PATCH 2/2] drm/i915: check for more ASLC interrupts

[Paulo Zanoni]

From: Paulo Zanoni <paulo.r.zanoni@intel.com>

Sometimes I see the "non asle set request??" message on my Haswell
machine, so I decided to get the spec and see if some bits are missing
from the mask. We do have some bits missing from the mask, so this
patch adds them, and the corresponding code to print "unsupported"
messages just like we do with the other bits we don't support.

But I still see the "non asle set request??" message on my machine :(

Also use the proper ASLC name to indicate the registers we're talking
about.

v2: - Properly set the new FAILED bits
    - Rename the old FAILED bits
    - Print everything we don't support

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
 drivers/gpu/drm/i915/intel_opregion.c | 153 +++++++++++++++++++++++++++-------
 1 file changed, 121 insertions(+), 32 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_opregion.c b/drivers/gpu/drm/i915/intel_opregion.c
index c4fb2ae..b627202 100644
--- a/drivers/gpu/drm/i915/intel_opregion.c
+++ b/drivers/gpu/drm/i915/intel_opregion.c
@@ -110,25 +110,38 @@ struct opregion_asle {
 	u32 epfm;       /* enabled panel fitting modes */
 	u8 plut[74];    /* panel LUT and identifier */
 	u32 pfmb;       /* PWM freq and min brightness */
-	u8 rsvd[102];
+	u32 cddv;       /* color correction default values */
+	u32 pcft;       /* power conservation features */
+	u32 srot;       /* supported rotation angles */
+	u32 iuer;       /* IUER events */
+	u8 rsvd[86];
 } __attribute__((packed));
 
 /* Driver readiness indicator */
 #define ASLE_ARDY_READY		(1 << 0)
 #define ASLE_ARDY_NOT_READY	(0 << 0)
 
-/* ASLE irq request bits */
-#define ASLE_SET_ALS_ILLUM     (1 << 0)
-#define ASLE_SET_BACKLIGHT     (1 << 1)
-#define ASLE_SET_PFIT          (1 << 2)
-#define ASLE_SET_PWM_FREQ      (1 << 3)
-#define ASLE_REQ_MSK           0xf
-
-/* response bits of ASLE irq request */
-#define ASLE_ALS_ILLUM_FAILED	(1<<10)
-#define ASLE_BACKLIGHT_FAILED	(1<<12)
-#define ASLE_PFIT_FAILED	(1<<14)
-#define ASLE_PWM_FREQ_FAILED	(1<<16)
+/* ASLE Interrupt Command (ASLC) bits */
+#define ASLC_SET_ALS_ILLUM		(1 << 0)
+#define ASLC_SET_BACKLIGHT		(1 << 1)
+#define ASLC_SET_PFIT			(1 << 2)
+#define ASLC_SET_PWM_FREQ		(1 << 3)
+#define ASLC_SUPPORTED_ROTATION_ANGLES	(1 << 4)
+#define ASLC_BUTTON_ARRAY		(1 << 5)
+#define ASLC_CONVERTIBLE_INDICATOR	(1 << 6)
+#define ASLC_DOCKING_INDICATOR		(1 << 7)
+#define ASLC_ISCT_STATE_CHANGE		(1 << 8)
+#define ASLC_REQ_MSK			0x1ff
+/* response bits */
+#define ASLC_ALS_ILLUM_FAILED		(1 << 10)
+#define ASLC_BACKLIGHT_FAILED		(1 << 12)
+#define ASLC_PFIT_FAILED		(1 << 14)
+#define ASLC_PWM_FREQ_FAILED		(1 << 16)
+#define ASLC_ROTATION_ANGLES_FAILED	(1 << 18)
+#define ASLC_BUTTON_ARRAY_FAILED	(1 << 20)
+#define ASLC_CONVERTIBLE_FAILED		(1 << 22)
+#define ASLC_DOCKING_FAILED		(1 << 24)
+#define ASLC_ISCT_STATE_FAILED		(1 << 26)
 
 /* Technology enabled indicator */
 #define ASLE_TCHE_ALS_EN	(1 << 0)
@@ -154,6 +167,15 @@ struct opregion_asle {
 
 #define ASLE_CBLV_VALID         (1<<31)
 
+/* IUER */
+#define ASLE_IUER_DOCKING		(1 << 7)
+#define ASLE_IUER_CONVERTIBLE		(1 << 6)
+#define ASLE_IUER_ROTATION_LOCK_BTN	(1 << 4)
+#define ASLE_IUER_VOLUME_DOWN_BTN	(1 << 3)
+#define ASLE_IUER_VOLUME_UP_BTN		(1 << 2)
+#define ASLE_IUER_WINDOWS_BTN		(1 << 1)
+#define ASLE_IUER_POWER_BTN		(1 << 0)
+
 /* Software System Control Interrupt (SWSCI) */
 #define SWSCI_SCIC_INDICATOR		(1 << 0)
 #define SWSCI_SCIC_MAIN_FUNCTION_SHIFT	1
@@ -377,11 +399,11 @@ static u32 asle_set_backlight(struct drm_device *dev, u32 bclp)
 	DRM_DEBUG_DRIVER("bclp = 0x%08x\n", bclp);
 
 	if (!(bclp & ASLE_BCLP_VALID))
-		return ASLE_BACKLIGHT_FAILED;
+		return ASLC_BACKLIGHT_FAILED;
 
 	bclp &= ASLE_BCLP_MSK;
 	if (bclp > 255)
-		return ASLE_BACKLIGHT_FAILED;
+		return ASLC_BACKLIGHT_FAILED;
 
 	intel_panel_set_backlight(dev, bclp, 255);
 	iowrite32(DIV_ROUND_UP(bclp * 100, 255) | ASLE_CBLV_VALID, &asle->cblv);
@@ -394,13 +416,13 @@ static u32 asle_set_als_illum(struct drm_device *dev, u32 alsi)
 	/* alsi is the current ALS reading in lux. 0 indicates below sensor
 	   range, 0xffff indicates above sensor range. 1-0xfffe are valid */
 	DRM_DEBUG_DRIVER("Illum is not supported\n");
-	return ASLE_ALS_ILLUM_FAILED;
+	return ASLC_ALS_ILLUM_FAILED;
 }
 
 static u32 asle_set_pwm_freq(struct drm_device *dev, u32 pfmb)
 {
 	DRM_DEBUG_DRIVER("PWM freq is not supported\n");
-	return ASLE_PWM_FREQ_FAILED;
+	return ASLC_PWM_FREQ_FAILED;
 }
 
 static u32 asle_set_pfit(struct drm_device *dev, u32 pfit)
@@ -408,39 +430,106 @@ static u32 asle_set_pfit(struct drm_device *dev, u32 pfit)
 	/* Panel fitting is currently controlled by the X code, so this is a
 	   noop until modesetting support works fully */
 	DRM_DEBUG_DRIVER("Pfit is not supported\n");
-	return ASLE_PFIT_FAILED;
+	return ASLC_PFIT_FAILED;
+}
+
+static u32 asle_set_supported_rotation_angles(struct drm_device *dev, u32 srot)
+{
+	DRM_DEBUG_DRIVER("SROT is not supported\n");
+	return ASLC_ROTATION_ANGLES_FAILED;
+}
+
+static u32 asle_set_button_array(struct drm_device *dev, u32 iuer)
+{
+	if (!iuer)
+		DRM_DEBUG_DRIVER("Button array event is not supported (nothing)\n");
+	if (iuer & ASLE_IUER_ROTATION_LOCK_BTN)
+		DRM_DEBUG_DRIVER("Button array event is not supported (rotation lock)\n");
+	if (iuer & ASLE_IUER_VOLUME_DOWN_BTN)
+		DRM_DEBUG_DRIVER("Button array event is not supported (volume down)\n");
+	if (iuer & ASLE_IUER_VOLUME_UP_BTN)
+		DRM_DEBUG_DRIVER("Button array event is not supported (volume up)\n");
+	if (iuer & ASLE_IUER_WINDOWS_BTN)
+		DRM_DEBUG_DRIVER("Button array event is not supported (windows)\n");
+	if (iuer & ASLE_IUER_POWER_BTN)
+		DRM_DEBUG_DRIVER("Button array event is not supported (power)\n");
+
+	return ASLC_BUTTON_ARRAY_FAILED;
+}
+
+static u32 asle_set_convertible(struct drm_device *dev, u32 iuer)
+{
+	if (iuer & ASLE_IUER_CONVERTIBLE)
+		DRM_DEBUG_DRIVER("Convertible is not supported (clamshell)\n");
+	else
+		DRM_DEBUG_DRIVER("Convertible is not supported (slate)\n");
+
+	return ASLC_CONVERTIBLE_FAILED;
+}
+
+static u32 asle_set_docking(struct drm_device *dev, u32 iuer)
+{
+	if (iuer & ASLE_IUER_DOCKING)
+		DRM_DEBUG_DRIVER("Docking is not supported (docked)\n");
+	else
+		DRM_DEBUG_DRIVER("Docking is not supported (undocked)\n");
+
+	return ASLC_DOCKING_FAILED;
+}
+
+static u32 asle_isct_state(struct drm_device *dev)
+{
+	DRM_DEBUG_DRIVER("ISCT is not supported\n");
+	return ASLC_ISCT_STATE_FAILED;
 }
 
 void intel_opregion_asle_intr(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct opregion_asle __iomem *asle = dev_priv->opregion.asle;
-	u32 asle_stat = 0;
-	u32 asle_req;
+	u32 aslc_stat = 0;
+	u32 aslc_req;
 
 	if (!asle)
 		return;
 
-	asle_req = ioread32(&asle->aslc) & ASLE_REQ_MSK;
+	aslc_req = ioread32(&asle->aslc);
 
-	if (!asle_req) {
-		DRM_DEBUG_DRIVER("non asle set request??\n");
+	if (!(aslc_req & ASLC_REQ_MSK)) {
+		DRM_DEBUG_DRIVER("No request on ASLC interrupt 0x%08x\n",
+				 aslc_req);
 		return;
 	}
 
-	if (asle_req & ASLE_SET_ALS_ILLUM)
-		asle_stat |= asle_set_als_illum(dev, ioread32(&asle->alsi));
+	if (aslc_req & ASLC_SET_ALS_ILLUM)
+		aslc_stat |= asle_set_als_illum(dev, ioread32(&asle->alsi));
+
+	if (aslc_req & ASLC_SET_BACKLIGHT)
+		aslc_stat |= asle_set_backlight(dev, ioread32(&asle->bclp));
+
+	if (aslc_req & ASLC_SET_PFIT)
+		aslc_stat |= asle_set_pfit(dev, ioread32(&asle->pfit));
+
+	if (aslc_req & ASLC_SET_PWM_FREQ)
+		aslc_stat |= asle_set_pwm_freq(dev, ioread32(&asle->pfmb));
+
+	if (aslc_req & ASLC_SUPPORTED_ROTATION_ANGLES)
+		aslc_stat |= asle_set_supported_rotation_angles(dev,
+							ioread32(&asle->srot));
+
+	if (aslc_req & ASLC_BUTTON_ARRAY)
+		aslc_stat |= asle_set_button_array(dev, ioread32(&asle->iuer));
 
-	if (asle_req & ASLE_SET_BACKLIGHT)
-		asle_stat |= asle_set_backlight(dev, ioread32(&asle->bclp));
+	if (aslc_req & ASLC_CONVERTIBLE_INDICATOR)
+		aslc_stat |= asle_set_convertible(dev, ioread32(&asle->iuer));
 
-	if (asle_req & ASLE_SET_PFIT)
-		asle_stat |= asle_set_pfit(dev, ioread32(&asle->pfit));
+	if (aslc_req & ASLC_DOCKING_INDICATOR)
+		aslc_stat |= asle_set_docking(dev, ioread32(&asle->iuer));
 
-	if (asle_req & ASLE_SET_PWM_FREQ)
-		asle_stat |= asle_set_pwm_freq(dev, ioread32(&asle->pfmb));
+	if (aslc_req & ASLC_ISCT_STATE_CHANGE)
+		aslc_stat |= asle_isct_state(dev);
 
-	iowrite32(asle_stat, &asle->aslc);
+	iowrite32(aslc_stat, &asle->aslc);
 }
 
 #define ACPI_EV_DISPLAY_SWITCH (1<<0)
-- 
1.8.3.1

Re: [PATCH 1/2] drm/i915: WARN is the DP aux read or write is too big

[Jani Nikula]

On Tue, 17 Sep 2013, Paulo Zanoni <przanoni@gmail.com> wrote:
> From: Paulo Zanoni <paulo.r.zanoni@intel.com>
>
> So far we control everything and nothing exceeds the current limits,
> but (i) we never think about these limits when reviewing patches, (ii)
> not all the callers check the return values and (iii) if we ever hit
> any of these messages, we'll have to fix the code that added the bad
> message.
>
> The current limit for these messages is 20 since we only have 5 data
> registers on all the current gens.
>
> The checks inside intel_dp_aux_native_{write,read} are to prevent
> buffer overflows. The check inside intel_dp_aux_ch is to prevent
> writing past our 5 data registers.

I wish there were fewer magic values, but it does what it says on the
box.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dp.c | 14 ++++++++++++--
>  1 file changed, 12 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 8c70a83..c324a59 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -436,6 +436,12 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
>  		goto out;
>  	}
>  
> +	/* Only 5 data registers! */
> +	if (WARN_ON(send_bytes > 20 || recv_size > 20)) {
> +		ret = -E2BIG;
> +		goto out;
> +	}
> +
>  	while ((aux_clock_divider = get_aux_clock_divider(intel_dp, clock++))) {
>  		/* Must try at least 3 times according to DP spec */
>  		for (try = 0; try < 5; try++) {
> @@ -526,9 +532,10 @@ intel_dp_aux_native_write(struct intel_dp *intel_dp,
>  	int msg_bytes;
>  	uint8_t	ack;
>  
> +	if (WARN_ON(send_bytes > 16))
> +		return -E2BIG;
> +
>  	intel_dp_check_edp(intel_dp);
> -	if (send_bytes > 16)
> -		return -1;
>  	msg[0] = AUX_NATIVE_WRITE << 4;
>  	msg[1] = address >> 8;
>  	msg[2] = address & 0xff;
> @@ -569,6 +576,9 @@ intel_dp_aux_native_read(struct intel_dp *intel_dp,
>  	uint8_t ack;
>  	int ret;
>  
> +	if (WARN_ON(recv_bytes > 19))
> +		return -E2BIG;
> +
>  	intel_dp_check_edp(intel_dp);
>  	msg[0] = AUX_NATIVE_READ << 4;
>  	msg[1] = address >> 8;
> -- 
> 1.8.3.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH 1/2] drm/i915: WARN is the DP aux read or write is too big

[Daniel Vetter]

On Tue, Sep 17, 2013 at 06:15:31PM +0300, Jani Nikula wrote:
> On Tue, 17 Sep 2013, Paulo Zanoni <przanoni@gmail.com> wrote:
> > From: Paulo Zanoni <paulo.r.zanoni@intel.com>
> >
> > So far we control everything and nothing exceeds the current limits,
> > but (i) we never think about these limits when reviewing patches, (ii)
> > not all the callers check the return values and (iii) if we ever hit
> > any of these messages, we'll have to fix the code that added the bad
> > message.
> >
> > The current limit for these messages is 20 since we only have 5 data
> > registers on all the current gens.
> >
> > The checks inside intel_dp_aux_native_{write,read} are to prevent
> > buffer overflows. The check inside intel_dp_aux_ch is to prevent
> > writing past our 5 data registers.
> 
> I wish there were fewer magic values, but it does what it says on the
> box.
> 
> Reviewed-by: Jani Nikula <jani.nikula@intel.com>

Is that for both patches? I've merged the first one for now to dinq ...

Thanks, Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

Re: [PATCH 2/2] drm/i915: check for more ASLC interrupts

[Jani Nikula]

On Tue, 17 Sep 2013, Paulo Zanoni <przanoni@gmail.com> wrote:
> From: Paulo Zanoni <paulo.r.zanoni@intel.com>
>
> Sometimes I see the "non asle set request??" message on my Haswell
> machine, so I decided to get the spec and see if some bits are missing
> from the mask. We do have some bits missing from the mask, so this
> patch adds them, and the corresponding code to print "unsupported"
> messages just like we do with the other bits we don't support.
>
> But I still see the "non asle set request??" message on my machine :(
>
> Also use the proper ASLC name to indicate the registers we're talking
> about.
>
> v2: - Properly set the new FAILED bits
>     - Rename the old FAILED bits
>     - Print everything we don't support

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_opregion.c | 153 +++++++++++++++++++++++++++-------
>  1 file changed, 121 insertions(+), 32 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_opregion.c b/drivers/gpu/drm/i915/intel_opregion.c
> index c4fb2ae..b627202 100644
> --- a/drivers/gpu/drm/i915/intel_opregion.c
> +++ b/drivers/gpu/drm/i915/intel_opregion.c
> @@ -110,25 +110,38 @@ struct opregion_asle {
>  	u32 epfm;       /* enabled panel fitting modes */
>  	u8 plut[74];    /* panel LUT and identifier */
>  	u32 pfmb;       /* PWM freq and min brightness */
> -	u8 rsvd[102];
> +	u32 cddv;       /* color correction default values */
> +	u32 pcft;       /* power conservation features */
> +	u32 srot;       /* supported rotation angles */
> +	u32 iuer;       /* IUER events */
> +	u8 rsvd[86];
>  } __attribute__((packed));
>  
>  /* Driver readiness indicator */
>  #define ASLE_ARDY_READY		(1 << 0)
>  #define ASLE_ARDY_NOT_READY	(0 << 0)
>  
> -/* ASLE irq request bits */
> -#define ASLE_SET_ALS_ILLUM     (1 << 0)
> -#define ASLE_SET_BACKLIGHT     (1 << 1)
> -#define ASLE_SET_PFIT          (1 << 2)
> -#define ASLE_SET_PWM_FREQ      (1 << 3)
> -#define ASLE_REQ_MSK           0xf
> -
> -/* response bits of ASLE irq request */
> -#define ASLE_ALS_ILLUM_FAILED	(1<<10)
> -#define ASLE_BACKLIGHT_FAILED	(1<<12)
> -#define ASLE_PFIT_FAILED	(1<<14)
> -#define ASLE_PWM_FREQ_FAILED	(1<<16)
> +/* ASLE Interrupt Command (ASLC) bits */
> +#define ASLC_SET_ALS_ILLUM		(1 << 0)
> +#define ASLC_SET_BACKLIGHT		(1 << 1)
> +#define ASLC_SET_PFIT			(1 << 2)
> +#define ASLC_SET_PWM_FREQ		(1 << 3)
> +#define ASLC_SUPPORTED_ROTATION_ANGLES	(1 << 4)
> +#define ASLC_BUTTON_ARRAY		(1 << 5)
> +#define ASLC_CONVERTIBLE_INDICATOR	(1 << 6)
> +#define ASLC_DOCKING_INDICATOR		(1 << 7)
> +#define ASLC_ISCT_STATE_CHANGE		(1 << 8)
> +#define ASLC_REQ_MSK			0x1ff
> +/* response bits */
> +#define ASLC_ALS_ILLUM_FAILED		(1 << 10)
> +#define ASLC_BACKLIGHT_FAILED		(1 << 12)
> +#define ASLC_PFIT_FAILED		(1 << 14)
> +#define ASLC_PWM_FREQ_FAILED		(1 << 16)
> +#define ASLC_ROTATION_ANGLES_FAILED	(1 << 18)
> +#define ASLC_BUTTON_ARRAY_FAILED	(1 << 20)
> +#define ASLC_CONVERTIBLE_FAILED		(1 << 22)
> +#define ASLC_DOCKING_FAILED		(1 << 24)
> +#define ASLC_ISCT_STATE_FAILED		(1 << 26)
>  
>  /* Technology enabled indicator */
>  #define ASLE_TCHE_ALS_EN	(1 << 0)
> @@ -154,6 +167,15 @@ struct opregion_asle {
>  
>  #define ASLE_CBLV_VALID         (1<<31)
>  
> +/* IUER */
> +#define ASLE_IUER_DOCKING		(1 << 7)
> +#define ASLE_IUER_CONVERTIBLE		(1 << 6)
> +#define ASLE_IUER_ROTATION_LOCK_BTN	(1 << 4)
> +#define ASLE_IUER_VOLUME_DOWN_BTN	(1 << 3)
> +#define ASLE_IUER_VOLUME_UP_BTN		(1 << 2)
> +#define ASLE_IUER_WINDOWS_BTN		(1 << 1)
> +#define ASLE_IUER_POWER_BTN		(1 << 0)
> +
>  /* Software System Control Interrupt (SWSCI) */
>  #define SWSCI_SCIC_INDICATOR		(1 << 0)
>  #define SWSCI_SCIC_MAIN_FUNCTION_SHIFT	1
> @@ -377,11 +399,11 @@ static u32 asle_set_backlight(struct drm_device *dev, u32 bclp)
>  	DRM_DEBUG_DRIVER("bclp = 0x%08x\n", bclp);
>  
>  	if (!(bclp & ASLE_BCLP_VALID))
> -		return ASLE_BACKLIGHT_FAILED;
> +		return ASLC_BACKLIGHT_FAILED;
>  
>  	bclp &= ASLE_BCLP_MSK;
>  	if (bclp > 255)
> -		return ASLE_BACKLIGHT_FAILED;
> +		return ASLC_BACKLIGHT_FAILED;
>  
>  	intel_panel_set_backlight(dev, bclp, 255);
>  	iowrite32(DIV_ROUND_UP(bclp * 100, 255) | ASLE_CBLV_VALID, &asle->cblv);
> @@ -394,13 +416,13 @@ static u32 asle_set_als_illum(struct drm_device *dev, u32 alsi)
>  	/* alsi is the current ALS reading in lux. 0 indicates below sensor
>  	   range, 0xffff indicates above sensor range. 1-0xfffe are valid */
>  	DRM_DEBUG_DRIVER("Illum is not supported\n");
> -	return ASLE_ALS_ILLUM_FAILED;
> +	return ASLC_ALS_ILLUM_FAILED;
>  }
>  
>  static u32 asle_set_pwm_freq(struct drm_device *dev, u32 pfmb)
>  {
>  	DRM_DEBUG_DRIVER("PWM freq is not supported\n");
> -	return ASLE_PWM_FREQ_FAILED;
> +	return ASLC_PWM_FREQ_FAILED;
>  }
>  
>  static u32 asle_set_pfit(struct drm_device *dev, u32 pfit)
> @@ -408,39 +430,106 @@ static u32 asle_set_pfit(struct drm_device *dev, u32 pfit)
>  	/* Panel fitting is currently controlled by the X code, so this is a
>  	   noop until modesetting support works fully */
>  	DRM_DEBUG_DRIVER("Pfit is not supported\n");
> -	return ASLE_PFIT_FAILED;
> +	return ASLC_PFIT_FAILED;
> +}
> +
> +static u32 asle_set_supported_rotation_angles(struct drm_device *dev, u32 srot)
> +{
> +	DRM_DEBUG_DRIVER("SROT is not supported\n");
> +	return ASLC_ROTATION_ANGLES_FAILED;
> +}
> +
> +static u32 asle_set_button_array(struct drm_device *dev, u32 iuer)
> +{
> +	if (!iuer)
> +		DRM_DEBUG_DRIVER("Button array event is not supported (nothing)\n");
> +	if (iuer & ASLE_IUER_ROTATION_LOCK_BTN)
> +		DRM_DEBUG_DRIVER("Button array event is not supported (rotation lock)\n");
> +	if (iuer & ASLE_IUER_VOLUME_DOWN_BTN)
> +		DRM_DEBUG_DRIVER("Button array event is not supported (volume down)\n");
> +	if (iuer & ASLE_IUER_VOLUME_UP_BTN)
> +		DRM_DEBUG_DRIVER("Button array event is not supported (volume up)\n");
> +	if (iuer & ASLE_IUER_WINDOWS_BTN)
> +		DRM_DEBUG_DRIVER("Button array event is not supported (windows)\n");
> +	if (iuer & ASLE_IUER_POWER_BTN)
> +		DRM_DEBUG_DRIVER("Button array event is not supported (power)\n");
> +
> +	return ASLC_BUTTON_ARRAY_FAILED;
> +}
> +
> +static u32 asle_set_convertible(struct drm_device *dev, u32 iuer)
> +{
> +	if (iuer & ASLE_IUER_CONVERTIBLE)
> +		DRM_DEBUG_DRIVER("Convertible is not supported (clamshell)\n");
> +	else
> +		DRM_DEBUG_DRIVER("Convertible is not supported (slate)\n");
> +
> +	return ASLC_CONVERTIBLE_FAILED;
> +}
> +
> +static u32 asle_set_docking(struct drm_device *dev, u32 iuer)
> +{
> +	if (iuer & ASLE_IUER_DOCKING)
> +		DRM_DEBUG_DRIVER("Docking is not supported (docked)\n");
> +	else
> +		DRM_DEBUG_DRIVER("Docking is not supported (undocked)\n");
> +
> +	return ASLC_DOCKING_FAILED;
> +}
> +
> +static u32 asle_isct_state(struct drm_device *dev)
> +{
> +	DRM_DEBUG_DRIVER("ISCT is not supported\n");
> +	return ASLC_ISCT_STATE_FAILED;
>  }
>  
>  void intel_opregion_asle_intr(struct drm_device *dev)
>  {
>  	struct drm_i915_private *dev_priv = dev->dev_private;
>  	struct opregion_asle __iomem *asle = dev_priv->opregion.asle;
> -	u32 asle_stat = 0;
> -	u32 asle_req;
> +	u32 aslc_stat = 0;
> +	u32 aslc_req;
>  
>  	if (!asle)
>  		return;
>  
> -	asle_req = ioread32(&asle->aslc) & ASLE_REQ_MSK;
> +	aslc_req = ioread32(&asle->aslc);
>  
> -	if (!asle_req) {
> -		DRM_DEBUG_DRIVER("non asle set request??\n");
> +	if (!(aslc_req & ASLC_REQ_MSK)) {
> +		DRM_DEBUG_DRIVER("No request on ASLC interrupt 0x%08x\n",
> +				 aslc_req);
>  		return;
>  	}
>  
> -	if (asle_req & ASLE_SET_ALS_ILLUM)
> -		asle_stat |= asle_set_als_illum(dev, ioread32(&asle->alsi));
> +	if (aslc_req & ASLC_SET_ALS_ILLUM)
> +		aslc_stat |= asle_set_als_illum(dev, ioread32(&asle->alsi));
> +
> +	if (aslc_req & ASLC_SET_BACKLIGHT)
> +		aslc_stat |= asle_set_backlight(dev, ioread32(&asle->bclp));
> +
> +	if (aslc_req & ASLC_SET_PFIT)
> +		aslc_stat |= asle_set_pfit(dev, ioread32(&asle->pfit));
> +
> +	if (aslc_req & ASLC_SET_PWM_FREQ)
> +		aslc_stat |= asle_set_pwm_freq(dev, ioread32(&asle->pfmb));
> +
> +	if (aslc_req & ASLC_SUPPORTED_ROTATION_ANGLES)
> +		aslc_stat |= asle_set_supported_rotation_angles(dev,
> +							ioread32(&asle->srot));
> +
> +	if (aslc_req & ASLC_BUTTON_ARRAY)
> +		aslc_stat |= asle_set_button_array(dev, ioread32(&asle->iuer));
>  
> -	if (asle_req & ASLE_SET_BACKLIGHT)
> -		asle_stat |= asle_set_backlight(dev, ioread32(&asle->bclp));
> +	if (aslc_req & ASLC_CONVERTIBLE_INDICATOR)
> +		aslc_stat |= asle_set_convertible(dev, ioread32(&asle->iuer));
>  
> -	if (asle_req & ASLE_SET_PFIT)
> -		asle_stat |= asle_set_pfit(dev, ioread32(&asle->pfit));
> +	if (aslc_req & ASLC_DOCKING_INDICATOR)
> +		aslc_stat |= asle_set_docking(dev, ioread32(&asle->iuer));
>  
> -	if (asle_req & ASLE_SET_PWM_FREQ)
> -		asle_stat |= asle_set_pwm_freq(dev, ioread32(&asle->pfmb));
> +	if (aslc_req & ASLC_ISCT_STATE_CHANGE)
> +		aslc_stat |= asle_isct_state(dev);
>  
> -	iowrite32(asle_stat, &asle->aslc);
> +	iowrite32(aslc_stat, &asle->aslc);
>  }
>  
>  #define ACPI_EV_DISPLAY_SWITCH (1<<0)
> -- 
> 1.8.3.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH 2/2] drm/i915: check for more ASLC interrupts

[Daniel Vetter]

On Tue, Sep 17, 2013 at 06:29:46PM +0300, Jani Nikula wrote:
> On Tue, 17 Sep 2013, Paulo Zanoni <przanoni@gmail.com> wrote:
> > From: Paulo Zanoni <paulo.r.zanoni@intel.com>
> >
> > Sometimes I see the "non asle set request??" message on my Haswell
> > machine, so I decided to get the spec and see if some bits are missing
> > from the mask. We do have some bits missing from the mask, so this
> > patch adds them, and the corresponding code to print "unsupported"
> > messages just like we do with the other bits we don't support.
> >
> > But I still see the "non asle set request??" message on my machine :(
> >
> > Also use the proper ASLC name to indicate the registers we're talking
> > about.
> >
> > v2: - Properly set the new FAILED bits
> >     - Rename the old FAILED bits
> >     - Print everything we don't support
> 
> Reviewed-by: Jani Nikula <jani.nikula@intel.com>

Queued for -next, thanks for the patch.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch