From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paulo Zanoni Subject: [PATCH 1/4] drm/i915: WARN in case PIPECONF is already enabled Date: Thu, 19 Sep 2013 17:07:26 -0300 Message-ID: <1379621249-1816-2-git-send-email-przanoni@gmail.com> References: <1379621249-1816-1-git-send-email-przanoni@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-ye0-f169.google.com (mail-ye0-f169.google.com [209.85.213.169]) by gabe.freedesktop.org (Postfix) with ESMTP id 2F9FBE7B59 for ; Thu, 19 Sep 2013 13:07:49 -0700 (PDT) Received: by mail-ye0-f169.google.com with SMTP id r13so3612011yen.14 for ; Thu, 19 Sep 2013 13:07:47 -0700 (PDT) In-Reply-To: <1379621249-1816-1-git-send-email-przanoni@gmail.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org Cc: Paulo Zanoni List-Id: intel-gfx@lists.freedesktop.org From: Paulo Zanoni After the modeset rework this really shouldn't be happening, so transform it into a WARN. A stuck pipe is a bad signal and is one of the things that can lead to full machine hangs. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_display.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 8fd13ab..5f1399d 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1737,7 +1737,7 @@ static void intel_enable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe, reg = PIPECONF(cpu_transcoder); val = I915_READ(reg); - if (val & PIPECONF_ENABLE) + if (WARN_ON(val & PIPECONF_ENABLE)) return; I915_WRITE(reg, val | PIPECONF_ENABLE); -- 1.8.3.1