From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ben Widawsky Subject: [PATCH 1/2] drm/i915: Print ring min freq scaling Date: Wed, 25 Sep 2013 16:35:32 -0700 Message-ID: <1380152133-1024-1-git-send-email-benjamin.widawsky@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail.bwidawsk.net (bwidawsk.net [166.78.191.112]) by gabe.freedesktop.org (Postfix) with ESMTP id 4383EE691E for ; Wed, 25 Sep 2013 16:35:45 -0700 (PDT) List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Intel GFX Cc: Ben Widawsky , Ben Widawsky List-Id: intel-gfx@lists.freedesktop.org This allows us to keep track of the values being set if we want to tweak this code. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/intel_pm.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index d27eda6..31cf188 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -3671,6 +3671,9 @@ void gen6_update_ring_freq(struct drm_device *dev) ring_freq = (gpu_freq * 5 + 3) / 4; ring_freq = max(min_ring_freq, ring_freq); /* leave ia_freq as the default, chosen by cpufreq */ + + DRM_DEBUG_DRIVER("Setup min ring frequency %dMHz for GT freq %dMHz\n", + ring_freq * 100, gpu_freq * 50); } else { /* On older processors, there is no separate ring * clock domain, so in order to boost the bandwidth @@ -3684,6 +3687,9 @@ void gen6_update_ring_freq(struct drm_device *dev) else ia_freq = max_ia_freq - ((diff * scaling_factor) / 2); ia_freq = DIV_ROUND_CLOSEST(ia_freq, 100); + + DRM_DEBUG_DRIVER("Setup min ring frequency %dMHz for GT freq %dMHz\n", + ia_freq * 100, gpu_freq * 50); } sandybridge_pcode_write(dev_priv, -- 1.8.4