From mboxrd@z Thu Jan 1 00:00:00 1970 From: Abdiel Janulgue Subject: drm/i915/hsw: Enable resource streamer (v2) Date: Wed, 9 Oct 2013 00:09:50 +0300 Message-ID: <1381266592-7558-1-git-send-email-abdiel.janulgue@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga03.intel.com (mga03.intel.com [143.182.124.21]) by gabe.freedesktop.org (Postfix) with ESMTP id 74937E606A for ; Tue, 8 Oct 2013 14:08:56 -0700 (PDT) List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org v2 of drm-i915 part of resource streamer enabling. Re-submitted finally now that the Mesa portions are starting to take shape. I also addressed some of the comments from Daniel and Chris from the previous implementation. Cc: Daniel Vetter Cc: Chris Wilson Abdiel Janulgue (2): drm/i915/hsw: Add I915_EXEC_RESOURCE_STREAMER flag drm/i915/hsw: Enable resource streamer bit on MI_BATCH_BUFFER_START -- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 2 ++ drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_ringbuffer.c | 7 ++++--- include/uapi/drm/i915_drm.h | 5 +++++ 4 files changed, 12 insertions(+), 3 deletions(-)