From mboxrd@z Thu Jan 1 00:00:00 1970 From: Imre Deak Subject: Re: [RFC] Runtime display PM for VLV/BYT Date: Tue, 15 Oct 2013 15:16:11 +0300 Message-ID: <1381839371.26119.12.camel@intelbox> References: <1381792069-27800-1-git-send-email-jbarnes@virtuousgeek.org> <20131015080606.GM13047@intel.com> Reply-To: imre.deak@intel.com Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1218488722==" Return-path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id A6FF9E68DC for ; Tue, 15 Oct 2013 05:16:14 -0700 (PDT) In-Reply-To: <20131015080606.GM13047@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Ville =?ISO-8859-1?Q?Syrj=E4l=E4?= Cc: intel-gfx@lists.freedesktop.org, Paulo R Zanoni List-Id: intel-gfx@lists.freedesktop.org --===============1218488722== Content-Type: multipart/signed; micalg="pgp-sha1"; protocol="application/pgp-signature"; boundary="=-CIi24aDus/4CetN7EWiv" --=-CIi24aDus/4CetN7EWiv Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Tue, 2013-10-15 at 11:06 +0300, Ville Syrj=C3=A4l=C3=A4 wrote: > On Mon, Oct 14, 2013 at 04:07:44PM -0700, Jesse Barnes wrote: > > This set adds bits needed for runtime power support, currently only > > lightly tested on VLV/BYT: > > 1) suspend/resume callbacks for different platforms > > 2) save/restore of display state across a power well toggle > > 3) get/put of display power well in critical places > >=20 > > The TODO list still has a few items on it, and I'm looking for feedback= : > > 1) sprinkle around some power well WARNs so we can catch things easil= y > > 2) add some tests using DPMS and NULL mode sets and comparing power > > well state > > 3) better debugfs support for multiple wells > > 4) refcount of power well in debugfs (with ref holders?) > > 5) more testing - I think the load time ref is still busted here and > > on HSW > > 6) convert HSW as well so DPMS will shut things down, not just mode > > sets > >=20 > > Thoughts or comments? >=20 > I'd also like to see what Imre cooked up, and then come up with some > grand unified design. Based on our discussions I think his power well > abstraction sounded somewhat nicer and more general. I've pushed what I have so far to: https://github.com/ideak/linux/commits/powerwells I've tested this on VLV with VGA output so far and somewhat on HSW. I'd still have to check the need to do any HW state save/restore and the GFX clock forcing, afaics Jesse has already code for these in his patchset. > Also your locking seems to be fubar in places (frobbing with sideband > while holding a spinlock). I think Imre converted the power wells to > use a mutex everywhere. Yea, I solved that by changing power_well->lock to be a mutex. > Or perhaps we just start with your stuff and Imre rebases his stuff on > top? That works for me too. In any case would be nice to get some feedback especially from Paulo as my changes are mostly about the current power domain / well handling parts. --Imre --=-CIi24aDus/4CetN7EWiv Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQEcBAABAgAGBQJSXTILAAoJEORIIAnNuWDFF0oH/0IRrskPtv+/xaIA1sIUXviq 7/XBB6YuRbY2HJfojNW4p4v+3woS+xBdYWJ0iMcPrc1V51UTpG2yRC3dNEzNhrbk eWqtk2Y0oG3K5ZXdyLAim+4Xy6mhN2rQDJlimelqJUGK6Qqxh7jly8Wwq1cgidsv fEpRdAAIjz1KJZRIUgoUpBBwfzuOZnQRuY7jM2c4yxKTXFdLu7UZQ5wxg8RCOO8m Jk2FKitok51MPk3obmZxLgGHEGna/Yx2HuTdRR9J59hYfu37Vs1mGoqKwC24oNAu OYyMaKe2a3DsGek2zuTSLIO52vjCOCLbXuRrrTF6XNDP0rbd15elp77/cvieecU= =zWiZ -----END PGP SIGNATURE----- --=-CIi24aDus/4CetN7EWiv-- --===============1218488722== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============1218488722==--